Change in ...coreboot[master]: arch/riscv: Don't enable ARCH_RISCV_M on non-RISC-V architecture

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33163

Change subject: arch/riscv: Don't enable ARCH_RISCV_M on non-RISC-V architecture
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arch/riscv: Don't enable ARCH_RISCV_M on non-RISC-V architecture

I found that ARCH_RISCV_M was enabled on my x86 platform, which is
confusing.  Disable it unless the chip is RISC-V based.

Signed-off-by: Martin Roth 
Change-Id: Ie6ddda60d60b45608245939303982dc0952cb9c3
---
M src/arch/riscv/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/33163/1

diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig
index 9d325af..f5253bb 100644
--- a/src/arch/riscv/Kconfig
+++ b/src/arch/riscv/Kconfig
@@ -24,6 +24,7 @@
    # one implementation that will not have it due
    # to security concerns.
    bool
+	depends on ARCH_RISCV
    default n if ARCH_RISCV_M_DISABLED
    default y

[Martin Roth (Code Review)]

Martin Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33163 )

Change subject: arch/riscv: Don't enable ARCH_RISCV_M on non-RISC-V architecture
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Abandoned

Subrata found this a few hours before I did.  Abandoning.