Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42482 )
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O settings ......................................................................
mb/asus/p8z77-v_lx2: Correct Super I/O settings
Compared against superiotool dumps with vendor firmware. Still boots.
Change-Id: I49f36b2805e36695d7a53865e87dfafdb897594e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asus/p8z77-v_lx2/devicetree.cb 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/42482/1
diff --git a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb index 8f51e15..6898c73 100644 --- a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb +++ b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb @@ -68,13 +68,13 @@ device pnp 2e.6 off end # CIR device pnp 2e.7 off end # GPIO6-8 device pnp 2e.8 off end # WDT1, GPIO0, GPIO1 - device pnp 2e.108 on end # GPIO0 - device pnp 2e.9 off end # GPIO1-8 + device pnp 2e.108 off end # GPIO0 + device pnp 2e.9 off end # GPIO8 device pnp 2e.109 off end # GPIO1 - device pnp 2e.209 off end # GPIO2 + device pnp 2e.209 on end # GPIO2 device pnp 2e.309 off end # GPIO3 device pnp 2e.409 off end # GPIO4 - device pnp 2e.509 on end # GPIO5 + device pnp 2e.509 off end # GPIO5 device pnp 2e.609 off end # GPIO6 device pnp 2e.709 off end # GPIO7 device pnp 2e.a on end # ACPI
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42482
to look at the new patch set (#4).
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O settings ......................................................................
mb/asus/p8z77-v_lx2: Correct Super I/O settings
Compared against superiotool dumps with vendor firmware. Still boots.
Change-Id: I49f36b2805e36695d7a53865e87dfafdb897594e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asus/p8z77-v_lx2/devicetree.cb 1 file changed, 6 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/42482/4
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42482 )
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O settings ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42482/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42482/4//COMMIT_MSG@10 PS4, Line 10: Can you please list the changes in the commit messages.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42482
to look at the new patch set (#5).
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings ......................................................................
mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings
Compared against superiotool dumps with vendor firmware. Still boots.
Change-Id: I49f36b2805e36695d7a53865e87dfafdb897594e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asus/p8z77-v_lx2/devicetree.cb 1 file changed, 6 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/42482/5
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42482 )
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42482/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42482/4//COMMIT_MSG@10 PS4, Line 10:
Can you please list the changes in the commit messages.
It's basically replicating the GPIO config. Since the Super I/O does not have a datasheet (it's actually a NCT5535D, but its ID is the same as that of NCT6779D) I don't know which pin is which GPIO.
Updated the commit summary.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42482 )
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings ......................................................................
Patch Set 7: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/42482/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42482/4//COMMIT_MSG@10 PS4, Line 10:
It's basically replicating the GPIO config. […]
it's very likely the same silicon, but one version has less pins bonded out
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42482 )
Change subject: mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings ......................................................................
mb/asus/p8z77-v_lx2: Correct Super I/O GPIO settings
Compared against superiotool dumps with vendor firmware. Still boots.
Change-Id: I49f36b2805e36695d7a53865e87dfafdb897594e Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42482 Reviewed-by: Felix Held felix-coreboot@felixheld.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/asus/p8z77-v_lx2/devicetree.cb 1 file changed, 6 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb index 8f51e15..33ff961 100644 --- a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb +++ b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb @@ -68,13 +68,15 @@ device pnp 2e.6 off end # CIR device pnp 2e.7 off end # GPIO6-8 device pnp 2e.8 off end # WDT1, GPIO0, GPIO1 - device pnp 2e.108 on end # GPIO0 - device pnp 2e.9 off end # GPIO1-8 + device pnp 2e.108 off end # GPIO0 + device pnp 2e.9 off end # GPIO8 device pnp 2e.109 off end # GPIO1 - device pnp 2e.209 off end # GPIO2 + device pnp 2e.209 on # GPIO2 + irq 0xe0 = 0xff + end device pnp 2e.309 off end # GPIO3 device pnp 2e.409 off end # GPIO4 - device pnp 2e.509 on end # GPIO5 + device pnp 2e.509 off end # GPIO5 device pnp 2e.609 off end # GPIO6 device pnp 2e.709 off end # GPIO7 device pnp 2e.a on end # ACPI
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Angel Pons (Code Review) -
Felix Held (Code Review)
-
Paul Menzel (Code Review)