Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Correct HWM related settings ......................................................................
mb/asrock/b85m_pro4: Correct HWM related settings
Only one generic decode range is needed for the HWM. Also, pin 3 was selected as fan input, but it is not connected. Use pin 93 instead, because boardviews show that it is wired to the PWR_FAN1 connector.
Change-Id: I964a073efbfaa1d79d3483d59ad04fe674bcb275 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asrock/b85m_pro4/devicetree.cb 1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/42131/1
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index eec921ec..b17d290 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -26,9 +26,7 @@ device pci 03.0 on end # Mini-HD audio
chip southbridge/intel/lynxpoint - register "gen1_dec" = "0x000c0291" - register "gen2_dec" = "0x000c0241" - register "gen3_dec" = "0x000c0251" + register "gen1_dec" = "0x000c0291" # Super I/O HWM register "pirqa_routing" = "0x8b" register "pirqb_routing" = "0x80" register "pirqc_routing" = "0x83" @@ -102,7 +100,7 @@ irq 0xf0 = 0x20 end device pnp 2e.b on # HWM, LED - irq 0x30 = 0xe1 + irq 0x30 = 0x61 # + Fan RPM sense pins io 0x60 = 0x0290 end device pnp 2e.d off end # VID
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Correct HWM related settings ......................................................................
Patch Set 1:
(1 comment)
Needs to be squashed with CB:42135
https://review.coreboot.org/c/coreboot/+/42131/1/src/mainboard/asrock/b85m_p... File src/mainboard/asrock/b85m_pro4/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42131/1/src/mainboard/asrock/b85m_p... PS1, Line 103: irq 0x30 = 0x61 # + Fan RPM sense pins This is wrong. Those pins are actually controlling gating of tach signals
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Correct HWM related settings ......................................................................
Patch Set 1:
(1 comment)
This change is ready for review.
https://review.coreboot.org/c/coreboot/+/42131/1/src/mainboard/asrock/b85m_p... File src/mainboard/asrock/b85m_pro4/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42131/1/src/mainboard/asrock/b85m_p... PS1, Line 103: irq 0x30 = 0x61 # + Fan RPM sense pins
This is wrong. […]
Pin 3: N/C Pin 4: GPO to enable CPU fan RPM reading on the 4-pin connector Pin 5: GPO to enable CPU fan RPM reading on the 3-pin connector Pin 90: CHA_FAN2 tach Pin 91: N/C (can be connected to SUSACK#) Pin 93: PWR_FAN1 tach
Original value was correct.
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Correct HWM related settings ......................................................................
Abandoned
Superseded by something else
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Correct HWM related settings ......................................................................
Restored
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42131
to look at the new patch set (#2).
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
mb/asrock/b85m_pro4: Drop spurious LPC decode ranges
Only one generic decode range is needed for the HWM.
Change-Id: I964a073efbfaa1d79d3483d59ad04fe674bcb275 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asrock/b85m_pro4/devicetree.cb 1 file changed, 1 insertion(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/42131/2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42131/3/src/mainboard/asrock/b85m_p... File src/mainboard/asrock/b85m_pro4/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42131/3/src/mainboard/asrock/b85m_p... PS3, Line 30: register "gen2_dec" = "0x000c0241" : register "gen3_dec" = "0x000c0251" those are from vendor "dump" , isn't it? Please teach me how do you found those are not needed?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42131/3/src/mainboard/asrock/b85m_p... File src/mainboard/asrock/b85m_pro4/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42131/3/src/mainboard/asrock/b85m_p... PS3, Line 30: register "gen2_dec" = "0x000c0241" : register "gen3_dec" = "0x000c0251"
those are from vendor "dump" , isn't it? […]
No, I copied those from h81m-hds carelessly
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42131/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42131/11//COMMIT_MSG@9 PS11, Line 9: Only one generic decode range is needed for the HWM. Please elaborate: found how? will it fix something?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42131/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42131/11//COMMIT_MSG@9 PS11, Line 9: Only one generic decode range is needed for the HWM.
Please elaborate: found how? will it fix something?
I had copied the code from elsewhere but didn't check it in detail. Then I revisited it and saw I only needed one range. It doesn't make much of a difference because the dropped decode ranges were not used.
I'm not sure if this is worth adding to the commit message. Still, want me to add something?
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
Patch Set 11: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42131/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42131/11//COMMIT_MSG@9 PS11, Line 9: Only one generic decode range is needed for the HWM.
I had copied the code from elsewhere but didn't check it in detail. […]
Ack
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42131 )
Change subject: mb/asrock/b85m_pro4: Drop spurious LPC decode ranges ......................................................................
mb/asrock/b85m_pro4: Drop spurious LPC decode ranges
Only one generic decode range is needed for the HWM.
Change-Id: I964a073efbfaa1d79d3483d59ad04fe674bcb275 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42131 Reviewed-by: Felix Held felix-coreboot@felixheld.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/asrock/b85m_pro4/devicetree.cb 1 file changed, 1 insertion(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index eec921ec..4bb5380 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -26,9 +26,7 @@ device pci 03.0 on end # Mini-HD audio
chip southbridge/intel/lynxpoint - register "gen1_dec" = "0x000c0291" - register "gen2_dec" = "0x000c0241" - register "gen3_dec" = "0x000c0251" + register "gen1_dec" = "0x000c0291" # Super I/O HWM register "pirqa_routing" = "0x8b" register "pirqb_routing" = "0x80" register "pirqc_routing" = "0x83"