Change in coreboot[master]: soc/amd/sabrina/fsp_m_params: don't hard-code USB PHY config table size

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64127 )

Change subject: soc/amd/sabrina/fsp_m_params: don't hard-code USB PHY config table size
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soc/amd/sabrina/fsp_m_params: don't hard-code USB PHY config table size

Use sizeof instead of having a hard-coded struct length.

Signed-off-by: Felix Held 
Change-Id: I3c39d770a7719e30572e71b6a6c24fa2ad4a9426
---
M src/soc/amd/sabrina/fsp_m_params.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/64127/1

diff --git a/src/soc/amd/sabrina/fsp_m_params.c b/src/soc/amd/sabrina/fsp_m_params.c
index 8a83008..cf3278f 100644
--- a/src/soc/amd/sabrina/fsp_m_params.c
+++ b/src/soc/amd/sabrina/fsp_m_params.c
@@ -145,7 +145,7 @@
    	mcfg->usb_phy = (struct usb_phy_config *)&config->usb_phy;
    	mcfg->usb_phy->Version_Major = 0xd;
    	mcfg->usb_phy->Version_Minor = 0x6;
-		mcfg->usb_phy->TableLength = 100;
+		mcfg->usb_phy->TableLength = sizeof(usb_phy_config);
    } else {
    	mcfg->usb_phy = NULL;
    }