[XS] Change in coreboot[master]: mb/google/myst: Update PCIE_RST_L drive

[Eric Lai (Code Review)]

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75700?usp=email )

Change subject: mb/google/myst: Update PCIE_RST_L drive
......................................................................

mb/google/myst: Update PCIE_RST_L drive

PCIE_RST_L is attached to a pull down, change the init to NC.

BUG=None
TEST=Boot to OS

Change-Id: I3f7a548a33eb18327139f033d7c0d6a1843f1639
Signed-off-by: Jon Murphy 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75700
Reviewed-by: Tim Van Patten 
Reviewed-by: Martin Roth 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/myst/variants/baseboard/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Martin Roth: Looks good to me, approved
  Tim Van Patten: Looks good to me, approved

diff --git a/src/mainboard/google/myst/variants/baseboard/gpio.c b/src/mainboard/google/myst/variants/baseboard/gpio.c
index f97cc16..d6cbe1e 100644
--- a/src/mainboard/google/myst/variants/baseboard/gpio.c
+++ b/src/mainboard/google/myst/variants/baseboard/gpio.c
@@ -52,7 +52,7 @@
    PAD_NC(GPIO_24),
    /* GPIO_25-26: Not available */
    /* SOC_PCIE_RST1_R_L  */
-	PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH),
+	PAD_NC(GPIO_27),
    /* GPIO_28: Not available */
    /* SD_AUX_RST */
    PAD_GPO(GPIO_29, LOW),