[S] Change in coreboot[master]: Revert "mb/google/brya/var/lisbon: Update gpio table"

[Robert Chen (Code Review)]

Robert Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73203 )

Change subject: Revert "mb/google/brya/var/lisbon: Update gpio table"
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Revert "mb/google/brya/var/lisbon: Update gpio table"

This reverts commit 0e0f9e51c4c4f190cbe7ef5bffa138601c644d3c.
Reason for revert: PLTRST only keeps 18xms and it's too short for
eMMC disk fully reset.

Change-Id: I13b93747bdb4d39de1ffcfdc020648871fa6e048
Signed-off-by: Robert Chen 
---
M src/mainboard/google/brya/variants/lisbon/gpio.c
1 file changed, 19 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/73203/1

diff --git a/src/mainboard/google/brya/variants/lisbon/gpio.c b/src/mainboard/google/brya/variants/lisbon/gpio.c
index 443d59c..1dfef5c 100644
--- a/src/mainboard/google/brya/variants/lisbon/gpio.c
+++ b/src/mainboard/google/brya/variants/lisbon/gpio.c
@@ -25,7 +25,7 @@
    /* B2  : VRALERT# ==> M2_SSD_PLA_L */
    PAD_NC(GPP_B2, NONE),
    /* B3  : PROC_GP2 ==> EMMC_PERST_L */
-	PAD_CFG_GPO_LOCK(GPP_B3, 1, LOCK_CONFIG),
+	PAD_CFG_GPO(GPP_B3, 1, DEEP),
    /* B7  : ISH_12C1_SDA ==> PCH_I2C_MISCB_SDA */
    PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
    /* B8  : ISH_I2C1_SCL ==> PCH_I2C_MISCB_SCL */
@@ -91,6 +91,8 @@
    PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
    /* A21 : DDPC_CTRCLK ==> EN_PP3300_EMMC */
    PAD_CFG_GPO(GPP_A21, 1, DEEP),
+	/* B3  : PROC_GP2 ==> EMMC_PERST_L */
+	PAD_CFG_GPO(GPP_B3, 0, DEEP),
    /* B4  : PROC_GP3 ==> SSD_PERST_L */
    PAD_CFG_GPO(GPP_B4, 0, DEEP),
    /* E15 : RSVD_TP ==> PCH_WP_OD */
@@ -134,6 +136,8 @@
 };

static const struct pad_config romstage_gpio_table[] = {
+	/* B3  : PROC_GP2 ==> EMMC_PERST_L */
+	PAD_CFG_GPO(GPP_B3, 1, DEEP),
    /* B4  : PROC_GP3 ==> SSD_PERST_L */
    PAD_CFG_GPO(GPP_B4, 1, DEEP),
 };