Change in coreboot[master]: mb/ocp/tiogapass: use common GPIO config

[Maxim Polyakov (Code Review)]

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Angel Pons,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39427

to look at the new patch set (#25).

Change subject: mb/ocp/tiogapass: use common GPIO config
......................................................................

mb/ocp/tiogapass: use common GPIO config

According to changes in the soc/xeon_sp code [1,2], server motherboards
with Lewisburg PCH can use the common pad configuration from soc/intel/
common, using macros PAD_CFG_ instead of the FSP-style GPIO definitions.

This patch adds the GPIO configuration, which has the format required by
the driver from common/gpio. The data for this was taken from the
inteltool register dump with AMI firmware and converted to macros using
intelp2m (pch-pads-parser) [3,4].

[1] https://review.coreboot.org/c/coreboot/+/39425
[2] https://review.coreboot.org/c/coreboot/+/39428
[3] https://review.coreboot.org/c/coreboot/+/35643
[4] https://github.com/maxpoliak/pch-pads-parser

Change-Id: I818d040fa33f3e7b94b73c9bbbafca5df424616d
Signed-off-by: Maxim Polyakov 
---
M src/mainboard/ocp/tiogapass/Makefile.inc
M src/mainboard/ocp/tiogapass/bootblock.c
A src/mainboard/ocp/tiogapass/gpio.h
M src/mainboard/ocp/tiogapass/ramstage.c
M src/mainboard/ocp/tiogapass/romstage.c
5 files changed, 619 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/39427/25