Change in coreboot[master]: soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE

[Arthur Heymans (Code Review)]

Hello Kyösti Mälkki, Patrick Rudolph, Huang Jin, York Yang, Philipp Deppenwiese, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/29910

to look at the new patch set (#5).

Change subject: soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE
......................................................................

soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE

This increases the boottime by 7ms.

Tested on Minnowboard Turbot.

Change-Id: I206f879f1d944c0a5e4e62ac4d2328889bc2b4ce
Signed-off-by: Arthur Heymans 
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M src/soc/intel/fsp_baytrail/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/29910/5