Change in coreboot[master]: mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHz

[Paul Menzel (Code Review)]

Attention is currently required from: Werner Zeh.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55089 )

Change subject: mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHz
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Patch Set 2: Code-Review+1

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/55089/comment/d5a1ad7d_4af29689 
PS2, Line 11: set up
Noun: setup

https://review.coreboot.org/c/coreboot/+/55089/comment/df84695b_a0fd22a0 
PS2, Line 13: Report additional bus timings for fast mode so that OS can do it right.
Could you please document, where you got the values from?

File src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/55089/comment/2d1c5f0f_ecaea99c 
PS2, Line 55: 				.scl_hcnt = 0x58,
Would using decimal base be more useful?