[XS] Change in coreboot[main]: Revert "mb/starlabs/starbook/adl_n: Remove SSD detect delay"

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86149?usp=email )

Change subject: Revert "mb/starlabs/starbook/adl_n: Remove SSD detect delay"
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Revert "mb/starlabs/starbook/adl_n: Remove SSD detect delay"

This reverts commit b3718dee9ce703456d8c31e82938d1a886de9873.

It seems that this is needed for specific drives, specifically,
the WD Black SN770.

Change-Id: I5ac2ea7978fca455d39fc7663e5cb219f3f8746f
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86149
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
---
M src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved

diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb
index 8342993..d9892c5 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb
@@ -187,6 +187,7 @@
    			.flags					= PCIE_RP_LTR | PCIE_RP_AER,
    			.pcie_rp_aspm				= ASPM_L0S_L1,
    			.PcieRpL1Substates			= L1_SS_L1_2,
+				.pcie_rp_detect_timeout_ms		= 50,

}"
    		smbios_slot_desc				"SlotTypeM2Socket3"