Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36640 )
Change subject: intel/braswell: Remove duplicate set_max_freq() prototypes ......................................................................
intel/braswell: Remove duplicate set_max_freq() prototypes
Change-Id: I13ec9f477c64831848fb0e80b97bfbc10896c195 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/braswell/bootblock/bootblock.c D src/soc/intel/braswell/include/soc/bootblock.h M src/soc/intel/braswell/include/soc/msr.h M src/soc/intel/braswell/include/soc/ramstage.h M src/soc/intel/braswell/include/soc/romstage.h M src/soc/intel/braswell/tsc_freq.c 6 files changed, 1 insertion(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/36640/1
diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c index d8d953c..6147dca 100644 --- a/src/soc/intel/braswell/bootblock/bootblock.c +++ b/src/soc/intel/braswell/bootblock/bootblock.c @@ -20,7 +20,6 @@ #include <console/console.h> #include <device/pci_ops.h> #include <pc80/mc146818rtc.h> -#include <soc/bootblock.h> #include <soc/gpio.h> #include <soc/iomap.h> #include <soc/iosf.h> diff --git a/src/soc/intel/braswell/include/soc/bootblock.h b/src/soc/intel/braswell/include/soc/bootblock.h deleted file mode 100644 index e6e25cc..0000000 --- a/src/soc/intel/braswell/include/soc/bootblock.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * Copyright (C) 2015-2016 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_BOOTBLOCK_H_ -#define _SOC_BOOTBLOCK_H_ - -void set_max_freq(void); - -#endif /* _SOC_BOOTBLOCK_H_ */ diff --git a/src/soc/intel/braswell/include/soc/msr.h b/src/soc/intel/braswell/include/soc/msr.h index 6137820..d0bfc8a 100644 --- a/src/soc/intel/braswell/include/soc/msr.h +++ b/src/soc/intel/braswell/include/soc/msr.h @@ -41,5 +41,6 @@
/* Read BCLK from MSR */ unsigned int cpu_bus_freq_khz(void); +void set_max_freq(void);
#endif /* _SOC_MSR_H_ */ diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h index f197bc8..17db2d8 100644 --- a/src/soc/intel/braswell/include/soc/ramstage.h +++ b/src/soc/intel/braswell/include/soc/ramstage.h @@ -98,7 +98,6 @@ */ void soc_init_pre_device(struct soc_intel_braswell_config *config); void soc_init_cpus(struct device *dev); -void set_max_freq(void); void southcluster_enable_dev(struct device *dev); void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index); int SocStepping(void); diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h index 9fad9bc..c9b559a 100644 --- a/src/soc/intel/braswell/include/soc/romstage.h +++ b/src/soc/intel/braswell/include/soc/romstage.h @@ -24,7 +24,6 @@
void gfx_init(void); void punit_init(void); -void set_max_freq(void);
/* romstage.c functions */ int chipset_prev_sleep_state(struct chipset_power_state *ps); diff --git a/src/soc/intel/braswell/tsc_freq.c b/src/soc/intel/braswell/tsc_freq.c index 28e3761..923d10c 100644 --- a/src/soc/intel/braswell/tsc_freq.c +++ b/src/soc/intel/braswell/tsc_freq.c @@ -17,11 +17,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/tsc.h> #include <soc/msr.h> -#if ENV_RAMSTAGE -#include <soc/ramstage.h> -#else -#include <soc/romstage.h> -#endif #include <stdint.h>
static const unsigned int cpu_bus_clk_freq_table[] = { @@ -57,8 +52,6 @@ return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000; }
-#if !ENV_SMM - void set_max_freq(void) { msr_t perf_ctl; @@ -91,5 +84,3 @@
wrmsr(IA32_PERF_CTL, perf_ctl); } - -#endif /* ENV_SMM */
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36640
to look at the new patch set (#2).
Change subject: intel/braswell: Remove duplicate set_max_freq() prototypes ......................................................................
intel/braswell: Remove duplicate set_max_freq() prototypes
Change-Id: I13ec9f477c64831848fb0e80b97bfbc10896c195 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/braswell/bootblock/bootblock.c D src/soc/intel/braswell/include/soc/bootblock.h M src/soc/intel/braswell/include/soc/msr.h M src/soc/intel/braswell/include/soc/ramstage.h M src/soc/intel/braswell/include/soc/romstage.h M src/soc/intel/braswell/tsc_freq.c 6 files changed, 2 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/36640/2
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36640 )
Change subject: intel/braswell: Remove duplicate set_max_freq() prototypes ......................................................................
Patch Set 2:
The function prototype is moved to msr.h, which does not cover the commit title.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36640 )
Change subject: intel/braswell: Remove duplicate set_max_freq() prototypes ......................................................................
Patch Set 2:
Patch Set 2:
The function prototype is moved to msr.h, which does not cover the commit title.
Then suggest a better title line!
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36640 )
Change subject: intel/braswell: Remove duplicate set_max_freq() prototypes ......................................................................
Patch Set 2: Code-Review+2
Patch Set 2:
Patch Set 2:
The function prototype is moved to msr.h, which does not cover the commit title.
Then suggest a better title line!
Solution if working on Facebook fbg1701.
Don't care about the title.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36640 )
Change subject: intel/braswell: Remove duplicate set_max_freq() prototypes ......................................................................
intel/braswell: Remove duplicate set_max_freq() prototypes
Change-Id: I13ec9f477c64831848fb0e80b97bfbc10896c195 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36640 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Frans Hendriks fhendriks@eltan.com --- M src/soc/intel/braswell/bootblock/bootblock.c D src/soc/intel/braswell/include/soc/bootblock.h M src/soc/intel/braswell/include/soc/msr.h M src/soc/intel/braswell/include/soc/ramstage.h M src/soc/intel/braswell/include/soc/romstage.h M src/soc/intel/braswell/tsc_freq.c 6 files changed, 2 insertions(+), 34 deletions(-)
Approvals: build bot (Jenkins): Verified Frans Hendriks: Looks good to me, approved
diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c index d8d953c..53cff31 100644 --- a/src/soc/intel/braswell/bootblock/bootblock.c +++ b/src/soc/intel/braswell/bootblock/bootblock.c @@ -20,11 +20,11 @@ #include <console/console.h> #include <device/pci_ops.h> #include <pc80/mc146818rtc.h> -#include <soc/bootblock.h> #include <soc/gpio.h> #include <soc/iomap.h> #include <soc/iosf.h> #include <soc/lpc.h> +#include <soc/msr.h> #include <soc/pm.h> #include <soc/spi.h>
diff --git a/src/soc/intel/braswell/include/soc/bootblock.h b/src/soc/intel/braswell/include/soc/bootblock.h deleted file mode 100644 index e6e25cc..0000000 --- a/src/soc/intel/braswell/include/soc/bootblock.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * Copyright (C) 2015-2016 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_BOOTBLOCK_H_ -#define _SOC_BOOTBLOCK_H_ - -void set_max_freq(void); - -#endif /* _SOC_BOOTBLOCK_H_ */ diff --git a/src/soc/intel/braswell/include/soc/msr.h b/src/soc/intel/braswell/include/soc/msr.h index 6137820..d0bfc8a 100644 --- a/src/soc/intel/braswell/include/soc/msr.h +++ b/src/soc/intel/braswell/include/soc/msr.h @@ -41,5 +41,6 @@
/* Read BCLK from MSR */ unsigned int cpu_bus_freq_khz(void); +void set_max_freq(void);
#endif /* _SOC_MSR_H_ */ diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h index f197bc8..17db2d8 100644 --- a/src/soc/intel/braswell/include/soc/ramstage.h +++ b/src/soc/intel/braswell/include/soc/ramstage.h @@ -98,7 +98,6 @@ */ void soc_init_pre_device(struct soc_intel_braswell_config *config); void soc_init_cpus(struct device *dev); -void set_max_freq(void); void southcluster_enable_dev(struct device *dev); void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index); int SocStepping(void); diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h index 9fad9bc..c9b559a 100644 --- a/src/soc/intel/braswell/include/soc/romstage.h +++ b/src/soc/intel/braswell/include/soc/romstage.h @@ -24,7 +24,6 @@
void gfx_init(void); void punit_init(void); -void set_max_freq(void);
/* romstage.c functions */ int chipset_prev_sleep_state(struct chipset_power_state *ps); diff --git a/src/soc/intel/braswell/tsc_freq.c b/src/soc/intel/braswell/tsc_freq.c index 28e3761..923d10c 100644 --- a/src/soc/intel/braswell/tsc_freq.c +++ b/src/soc/intel/braswell/tsc_freq.c @@ -17,11 +17,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/tsc.h> #include <soc/msr.h> -#if ENV_RAMSTAGE -#include <soc/ramstage.h> -#else -#include <soc/romstage.h> -#endif #include <stdint.h>
static const unsigned int cpu_bus_clk_freq_table[] = { @@ -57,8 +52,6 @@ return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000; }
-#if !ENV_SMM - void set_max_freq(void) { msr_t perf_ctl; @@ -91,5 +84,3 @@
wrmsr(IA32_PERF_CTL, perf_ctl); } - -#endif /* ENV_SMM */
-
Frans Hendriks (Code Review) -
Kyösti Mälkki (Code Review)
-
Patrick Georgi (Code Review)