Patch set updated for coreboot: 037719e device/pci_ids.h: defines for new Intel LPC devices

[Martin Roth]

Martin Roth ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5810

-gerrit

commit 037719ea8e366401534bb2d11c009e51187610c6
Author: Martin Roth 
Date:   Wed May 21 15:07:26 2014 -0600

device/pci_ids.h: defines for new Intel LPC devices

Add defines for the Cave Creek and Rangeley LPC devices.  These
    chipsets will be added shortly.  This file is outside of any of
    the directories that will be touched by those additions, so it's
    getting changed in its own commit.

Change-Id: Ia829282b2ad67eef09689858500bc7f93a1cd05b
    Signed-off-by: Martin Roth 
    Signed-off-by: Martin Roth 
---
 src/include/device/pci_ids.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 50ab96c..4f15c37 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2531,10 +2531,13 @@
 #define PCI_DEVICE_ID_INTEL_82801IO_LPC		0x2914
 #define PCI_DEVICE_ID_INTEL_82801IH_LPC		0x2912

+#define PCI_DEVICE_ID_INTEL_CAVECREEK_LPC 0x2310
 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN	0x1c41
 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX	0x1c5f
 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41
 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f
+#define PCI_DEVICE_ID_INTEL_RANGELEY_LPC_MIN 0x1f38
+#define PCI_DEVICE_ID_INTEL_RANGELEY_LPC_MAX 0x1f3b
 #define PCI_DEVICE_ID_INTEL_TGP_LPC	0x27bc

/* Intel 82801E (C-ICH) */