Change in coreboot[master]: soc/intel/skylake/graphics: Ensure intel_gma_restore_opregion() is ca...

[Nico Huber (Code Review)]

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/25466

Change subject: soc/intel/skylake/graphics: Ensure intel_gma_restore_opregion() is called
......................................................................

soc/intel/skylake/graphics: Ensure intel_gma_restore_opregion() is called

Change-Id: If981fa3db12b3a4fe1411f4cce9bac8564697769
Signed-off-by: Nico Huber 
---
M src/soc/intel/skylake/graphics.c
1 file changed, 8 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/25466/1

diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index 8991fa3..693c6c9 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -45,6 +45,11 @@
    	graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
    }

+	/* IGD needs to Bus Master */
+	u32 reg32 = pci_read_config32(dev, PCI_COMMAND);
+	reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
+	pci_write_config32(dev, PCI_COMMAND, reg32);
+
    /*
     * GFX PEIM module inside FSP binary is taking care of graphics
     * initialization based on RUN_FSP_GOP Kconfig option and input
@@ -53,15 +58,9 @@
     * In case of non-FSP solution, SoC need to select another
     * Kconfig to perform GFX initialization.
     */
-	if (IS_ENABLED(CONFIG_RUN_FSP_GOP))
-		return;
-
-	/* IGD needs to Bus Master */
-	u32 reg32 = pci_read_config32(dev, PCI_COMMAND);
-	reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
-	pci_write_config32(dev, PCI_COMMAND, reg32);
-
-	if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
+	if (IS_ENABLED(CONFIG_RUN_FSP_GOP)) {
+		/* nothing to do */
+	} else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
    	if (!acpi_is_wakeup_s3() && display_init_required()) {
    		int lightup_ok;
    		gma_gfxinit(&lightup_ok);