Change in coreboot[master]: mb/intel/adlrvp: Fix Tmode setting for ADL P RVP

[Sathya Prakash M R (Code Review)]

Sathya Prakash M R has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56208 )

Change subject: mb/intel/adlrvp: Fix Tmode setting for ADL P RVP
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mb/intel/adlrvp: Fix Tmode setting for ADL P RVP

With code to add enum for UPD configuration the setting
for ADL P was incorrect
Commit : 50f8b4ebdd7db8077b87ab7686637599c9d93af3

Earlier setting was with older FSP which was carry forwarded.
This is now fixed.

TEST=Verify HDMI /DP Playback on ADL P RVP

Signed-off-by: Sathya Prakash M R 
Change-Id: Ia39a33f5da2fea0dc2eaf4eae45999a711c61c33
---
M src/mainboard/intel/adlrvp/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/56208/1

diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index 8c823cd..7921c0f 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -173,7 +173,7 @@

# HD Audio
    register "PchHdaDspEnable" = "1"
-	register "PchHdaIDispLinkTmode" = "HDA_TMODE_4T"
+	register "PchHdaIDispLinkTmode" = "HDA_TMODE_8T"
    register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ"
    register "PchHdaIDispCodecEnable" = "1"