Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
soc/amd/common: Use ACPIMMIO_BASE() in ASL
Change-Id: Iff6bdbe5a12f1a47c7ce348a628e0b67aac37c7c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl M src/soc/amd/common/acpi/gpio_bank_lib.asl M src/soc/amd/common/block/include/amdblocks/acpimmio_map.h M src/soc/amd/picasso/acpi/sb_fch.asl M src/soc/amd/stoneyridge/acpi/sb_fch.asl 5 files changed, 7 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/42944/1
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl index 837678a..f61f6a0 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl @@ -22,7 +22,7 @@ Name (RBUF, ResourceTemplate () { // Memory resource is for MISC FCH register set. // It is needed for enabling the clock. - Memory32Fixed(ReadWrite, ACPIMMIO_MISC_BASE, 0x100) + Memory32Fixed(ReadWrite, ACPIMMIO_BASE(MISC), 0x100) })
Return (RBUF) diff --git a/src/soc/amd/common/acpi/gpio_bank_lib.asl b/src/soc/amd/common/acpi/gpio_bank_lib.asl index f73340c..b60fba91 100644 --- a/src/soc/amd/common/acpi/gpio_bank_lib.asl +++ b/src/soc/amd/common/acpi/gpio_bank_lib.asl @@ -6,7 +6,7 @@ Method (GPAD, 0x1) { /* Arg0 - GPIO pin number */ - Return (Add(Multiply(Arg0, 4), ACPIMMIO_GPIO0_BASE)) + Return (Add(Multiply(Arg0, 4), ACPIMMIO_BASE(GPIO0))) }
/* Read pin control dword */ diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h index e5caefc..e8f4625 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h @@ -94,12 +94,6 @@
#define AMD_SB_ACPI_MMIO_ADDR 0xfed80000
-#ifdef __ACPI__ -/* ASL MemoryFixed32() fails if these are additions. */ -#define ACPIMMIO_MISC_BASE 0xfed80e00 -#define ACPIMMIO_GPIO0_BASE 0xfed81500 -#endif - #define ACPIMMIO_SM_PCI_BANK 0x0000 #define ACPIMMIO_GPIO_100_BANK 0x0100 #define ACPIMMIO_SMI_BANK 0x0200 diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index 007df8d..d283402 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -34,7 +34,7 @@ ActiveLow, Exclusive, , , IRQR) { 0 } - Memory32Fixed (ReadWrite, ACPIMMIO_GPIO0_BASE, 0x300) + Memory32Fixed (ReadWrite, ACPIMMIO_BASE(GPIO0), 0x300) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PMOD) { @@ -44,7 +44,7 @@ } If (IRQN == 0x1f) { Return (ResourceTemplate() { - Memory32Fixed (ReadWrite, ACPIMMIO_GPIO0_BASE, 0x300) + Memory32Fixed (ReadWrite, ACPIMMIO_BASE(GPIO0), 0x300) }) } Else { Return (Local0) @@ -396,7 +396,7 @@ Name (_HID, "AMD0040") Name (_UID, 0x3) Name (_CRS, ResourceTemplate() { - Memory32Fixed (ReadWrite, ACPIMMIO_MISC_BASE, 0x100) + Memory32Fixed (ReadWrite, ACPIMMIO_BASE(MISC), 0x100) }) Method (_STA, 0x0, NotSerialized) { diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl index c999b67..9adb82a 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl @@ -30,7 +30,7 @@ { Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) { 7 } - Memory32Fixed (ReadWrite, ACPIMMIO_GPIO0_BASE, 0x300) + Memory32Fixed (ReadWrite, ACPIMMIO_BASE(GPIO0), 0x300) })
Method (_STA, 0x0, NotSerialized) @@ -132,7 +132,7 @@ Name (_HID, "AMD0040") Name (_UID, 0x3) Name (_CRS, ResourceTemplate() { - Memory32Fixed(ReadWrite, ACPIMMIO_MISC_BASE, 0x100) + Memory32Fixed(ReadWrite, ACPIMMIO_BASE(MISC), 0x100) }) Method (_STA, 0x0, NotSerialized) {
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Patch Set 1:
Raul, I found that 'cannot add in ASL' case again.
Kyösti Mälkki has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Abandoned
Kyösti Mälkki has restored this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Restored
Hello build bot (Jenkins), Raul Rangel,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42944
to look at the new patch set (#2).
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
soc/amd/common: Use ACPIMMIO_BASE() in ASL
Change-Id: Iff6bdbe5a12f1a47c7ce348a628e0b67aac37c7c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl M src/soc/amd/common/acpi/gpio_bank_lib.asl M src/soc/amd/common/block/include/amdblocks/acpimmio_map.h M src/soc/amd/picasso/acpi/sb_fch.asl M src/soc/amd/stoneyridge/acpi/sb_fch.asl 5 files changed, 7 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/42944/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Patch Set 2: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... File src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl:
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... PS2, Line 21: Method (_CRS, 0x0, Serialized) { : Name (RBUF, ResourceTemplate () { : // Memory resource is for MISC FCH register set. : // It is needed for enabling the clock. : Memory32Fixed(ReadWrite, ACPIMMIO_BASE(MISC), 0x100) : }) : : Return (RBUF) : } You can do the following:
Name (RBUF, ResourceTemplate () { // Memory resource is for MISC FCH register set. // It is needed for enabling the clock. Memory32Fixed(ReadWrite, 0, 0x100, MISC) })
Method (_CRS, 0, Serialized) { CreateDwordField (RBUF, ^MISC._BAS, MBAS) MBAS = ACPIMMIO_BASE(MISC) Return (RBUF) }
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... File src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl:
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... PS2, Line 21: Method (_CRS, 0x0, Serialized) { : Name (RBUF, ResourceTemplate () { : // Memory resource is for MISC FCH register set. : // It is needed for enabling the clock. : Memory32Fixed(ReadWrite, ACPIMMIO_BASE(MISC), 0x100) : }) : : Return (RBUF) : }
You can do the following: […]
We can do that in a follow up, not this CL.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... File src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl:
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... PS2, Line 21: Method (_CRS, 0x0, Serialized) { : Name (RBUF, ResourceTemplate () { : // Memory resource is for MISC FCH register set. : // It is needed for enabling the clock. : Memory32Fixed(ReadWrite, ACPIMMIO_BASE(MISC), 0x100) : }) : : Return (RBUF) : }
We can do that in a follow up, not this CL.
The reason to do this in this change is because IASL does not like additions on Memory32Fixed values (e.g. `ACPIMMIO_BASE(MISC)`), which is why this change fails to build.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42944 )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Patch Set 2: -Code-Review
(1 comment)
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... File src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl:
https://review.coreboot.org/c/coreboot/+/42944/2/src/mainboard/google/kahlee... PS2, Line 21: Method (_CRS, 0x0, Serialized) { : Name (RBUF, ResourceTemplate () { : // Memory resource is for MISC FCH register set. : // It is needed for enabling the clock. : Memory32Fixed(ReadWrite, ACPIMMIO_BASE(MISC), 0x100) : }) : : Return (RBUF) : }
The reason to do this in this change is because IASL does not like additions on Memory32Fixed values […]
Ah, I couldn't access the error.
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/42944?usp=email )
Change subject: soc/amd/common: Use ACPIMMIO_BASE() in ASL ......................................................................
Abandoned
-
Angel Pons (Code Review) -
Kyösti Mälkki (Code Review)
-
Raul Rangel (Code Review)
-
Stefan Reinauer (Code Review)