Sridhar Siricilla has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71116 )
Change subject: soc/intel/common: Move SGX supported API to cpulib ......................................................................
soc/intel/common: Move SGX supported API to cpulib
Move is_sgx_supported() API to common cpulib code, so that this function can be used by other code without enabling SOC_INTEL_COMMON_BLOCK_SGX_ENABLE config option.
Change-Id: Ib630ac451152ae2471c862fced992dde3b49d05d Signed-off-by: Pratikkumar Prajapati pratikkumar.v.prajapati@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/71116 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/common/block/include/intelblocks/sgx.h M src/soc/intel/common/block/sgx/sgx.c 4 files changed, 34 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Sridhar Siricilla: Looks good to me, approved Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 5332d01..0e78344 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -523,3 +523,13 @@ { return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ; } + +bool is_sgx_supported(void) +{ + struct cpuid_result cpuid_regs; + msr_t msr; + + cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */ + msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ + return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); +} diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 7878bf4..6c3aa56 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -211,4 +211,10 @@ */ void set_tme_core_activate(void);
+/* + * This function checks if the CPU supports SGX feature. + * Returns true if SGX feature is supported otherwise false. + */ +bool is_sgx_supported(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h index 3099faf..ac056f7 100644 --- a/src/soc/intel/common/block/include/intelblocks/sgx.h +++ b/src/soc/intel/common/block/include/intelblocks/sgx.h @@ -6,11 +6,6 @@ #include <soc/nvs.h>
/* - * Check if SGX is supported - */ -int is_sgx_supported(void); - -/* * Configure core PRMRR. * PRMRR needs to configured first on all cores and then * call sgx_configure() for all cores to init SGX. diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c index 88fe174..31447f9 100644 --- a/src/soc/intel/common/block/sgx/sgx.c +++ b/src/soc/intel/common/block/sgx/sgx.c @@ -12,16 +12,6 @@ #include <soc/cpu.h> #include <soc/pci_devs.h>
-int is_sgx_supported(void) -{ - struct cpuid_result cpuid_regs; - msr_t msr; - - cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */ - msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ - return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); -} - void prmrr_core_configure(void) { msr_t prmrr_base, prmrr_mask;