Change in coreboot[master]: mb/google/zork/dirinboz: Increase eMMC initial clock frequency
Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45934 )
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/dirinboz: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=WIP
Signed-off-by: Rob Barnes robbarnes@google.com Change-Id: I6bac8284b67070ff2c5838257f4ae2ead0e69c22 --- M src/mainboard/google/zork/variants/dirinboz/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45934/1
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index 905bc88..a11fa5e 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -36,6 +36,12 @@ .early_init = true, }"
+ register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45934
to look at the new patch set (#2).
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/dirinboz: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=WIP BRANCH=zork
Signed-off-by: Rob Barnes robbarnes@google.com Change-Id: I6bac8284b67070ff2c5838257f4ae2ead0e69c22 --- M src/mainboard/google/zork/variants/dirinboz/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45934/2
Hello Sam McNally, build bot (Jenkins), Martin Roth, Marshall Dawson,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45934
to look at the new patch set (#3).
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/dirinboz: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot dirinboz, run integrity test, b:169940185 BRANCH=zork
Signed-off-by: Rob Barnes robbarnes@google.com Change-Id: I6bac8284b67070ff2c5838257f4ae2ead0e69c22 --- M src/mainboard/google/zork/variants/dirinboz/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45934/3
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45934 )
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45934 )
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+2
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45934 )
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45934 )
Change subject: mb/google/zork/dirinboz: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/dirinboz: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot dirinboz, run integrity test, b:169940185 BRANCH=zork
Signed-off-by: Rob Barnes robbarnes@google.com Change-Id: I6bac8284b67070ff2c5838257f4ae2ead0e69c22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45934 Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Sam McNally sammc@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/dirinboz/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Marshall Dawson: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index 905bc88..a11fa5e 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -36,6 +36,12 @@ .early_init = true, }"
+ register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit
-
Marshall Dawson (Code Review) -
Martin Roth (Code Review)
-
Patrick Georgi (Code Review)
-
Rob Barnes (Code Review)
-
Sam McNally (Code Review)