Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Paul Menzel, Subrata Banik.
Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )
Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table ......................................................................
Patch Set 11:
(6 comments)
File src/soc/intel/common/block/acpi/Kconfig:
https://review.coreboot.org/c/coreboot/+/84103/comment/586da105_dfb1d194?usp... : PS11, Line 80: e
nit […]
Done
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/84103/comment/d1e0cd39_c2d5ac6c?usp... : PS11, Line 108: fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t);
move this at line #106?
thx
https://review.coreboot.org/c/coreboot/+/84103/comment/703266b2_582c82b7?usp... : PS11, Line 109: !fadt->gpe1_blk
again same mistake. […]
oh. no. thx
https://review.coreboot.org/c/coreboot/+/84103/comment/cff57e2c_fc9b1bb7?usp... : PS11, Line 110: gpe0_blk_len
shouldn't this be `fadt->gpe1_blk_len`
fixed. also, GPE1_REG_MAX.
https://review.coreboot.org/c/coreboot/+/84103/comment/79990b7f_25429890?usp... : PS11, Line 115: 0
should be `gpe1_blk_len` as per ACPI spec? […]
Subrata, gp10_blk_en is correct since its starting bit is right after the end of gpe0.
Also confirmed with BIOS code: #define EFI_ACPI_GPE1_BASE (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 2)
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/84103/comment/a7fadbda_0c0a6c69?usp... : PS11, Line 140: In addition, the following SOC GPE1 defines are required in common : * code but not present in older platform headers. Therefore, the dummy entries : * are added here for platforms without GPE1 support.
move this highlighted comment above line #11 as its applicable there
Done