Attention is currently required from: Patrick Rudolph. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56021 )
Change subject: cpu/intel/car/p4: Add support x86_64 ......................................................................
cpu/intel/car/p4: Add support x86_64
Change-Id: I77516e3cd5f0d3b7442be660c005a65b00454343 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/car/p4-netburst/cache_as_ram.S M src/cpu/intel/model_1067x/Kconfig M src/cpu/intel/model_6fx/Kconfig M src/cpu/intel/model_f3x/Kconfig M src/cpu/intel/model_f4x/Kconfig 5 files changed, 20 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/56021/1
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S index 71ec9e3..9c18bf8 100644 --- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S +++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S @@ -359,6 +359,17 @@ andl $0xfffffff0, %esp subl $4, %esp
+#if ENV_X86_64 + + #include <cpu/x86/64bit/entry64.inc> + + movd %mm2, %rdi + shlq $32, %rdi + movd %mm1, %rsi + or %rsi, %rdi + movd %mm0, %rsi + +#else /* push TSC and BIST to stack */ movd %mm0, %eax pushl %eax /* BIST */ @@ -366,6 +377,7 @@ pushl %eax /* tsc[63:32] */ movd %mm1, %eax pushl %eax /* tsc[31:0] */ +#endif
before_c_entry: post_code(0x2f) diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 6ddb99e..c26f11e 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_MODEL_1067X bool - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64 + select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64 select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index 048178a..0da9c52 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_MODEL_6FX bool - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64 + select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64 select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 151a8e7..cc62dfa 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_MODEL_F3X bool - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64 + select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 2d31655..2bf0acf 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,5 +1,6 @@ config CPU_INTEL_MODEL_F4X bool - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64 + select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS
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Arthur Heymans (Code Review)