Change in coreboot[master]: [WIP]: soc/amd/cezanne: Generate PCI routing table

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Eric Peers, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51556 )

Change subject: [WIP]: soc/amd/cezanne: Generate PCI routing table
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Patch Set 1:

(1 comment)

File src/soc/amd/cezanne/pcie_gpp.c:

https://review.coreboot.org/c/coreboot/+/51556/comment/7addc4b7_bfda9bbe 
PS1, Line 59: tatic const struct pci_logical_map pci_logical_numbers[] = {
            : 	{PCIE_GPP_1_0_DEVFN, 1},
            : 	{PCIE_GPP_1_1_DEVFN, 5},
            : 	{PCIE_GPP_1_2_DEVFN, 6},
            : 
            : 	{PCIE_GPP_2_0_DEVFN, 7},
            : 	{PCIE_GPP_2_1_DEVFN, 8},
            : 	{PCIE_GPP_2_2_DEVFN, 3},
            : 	{PCIE_GPP_2_3_DEVFN, 4},
            : 	{PCIE_GPP_2_4_DEVFN, 0},
            : 	{PCIE_GPP_2_5_DEVFN, 2},
            : 	{PCIE_GPP_2_6_DEVFN, 9},
            : 
            : 	{PCIE_ABC_A_DEVFN,   10},
            : 	{PCIE_GPP_B_DEVFN,   11},
            : 	{PCIE_GPP_C_DEVFN,   12},
            : };
> Did you compare this with majolica? We might need to pull this out into the mainboard. […]

It looks like you are right. We might need to pull this out into mainboard.c. Here is what I see in Majolica.

IOHC0NBCFGx100B8 NB_PROG_DEVICE_REMAP_PBr0 => 0x0000000a
IOHC0NBCFGx100BC NB_PROG_DEVICE_REMAP_PBr1 => 0x00000009
IOHC0NBCFGx100C0 NB_PROG_DEVICE_REMAP_PBr2 => 0x0000000b
IOHC0NBCFGx100C4 NB_PROG_DEVICE_REMAP_PBr3 => 0x00000016
IOHC0NBCFGx100C8 NB_PROG_DEVICE_REMAP_PBr4 => 0x00000011
IOHC0NBCFGx100CC NB_PROG_DEVICE_REMAP_PBr5 => 0x00000012
IOHC0NBCFGx100D0 NB_PROG_DEVICE_REMAP_PBr6 => 0x00000013
IOHC0NBCFGx100D4 NB_PROG_DEVICE_REMAP_PBr7 => 0x00000014
IOHC0NBCFGx100D8 NB_PROG_DEVICE_REMAP_PBr8 => 0x00000015
IOHC0NBCFGx100DC NB_PROG_DEVICE_REMAP_PBr9 => 0x00000017
IOHC0NBCFGx100E0 NB_PROG_DEVICE_REMAP_PBr10 => 0x00000041
IOHC0NBCFGx100E4 NB_PROG_DEVICE_REMAP_PBr11 => 0x00000042
IOHC0NBCFGx100E8 NB_PROG_DEVICE_REMAP_PBr12 => 0x00000043

Based on that, this is what the logical number mapping should be:

static const struct pci_logical_map pci_logical_numbers[] = {
    {PCIE_GPP_1_0_DEVFN, 1},
    {PCIE_GPP_1_1_DEVFN, 0},
    {PCIE_GPP_1_2_DEVFN, 2},

{PCIE_GPP_2_0_DEVFN, 4},
    {PCIE_GPP_2_1_DEVFN, 5},
    {PCIE_GPP_2_2_DEVFN, 6},
    {PCIE_GPP_2_3_DEVFN, 7},
    {PCIE_GPP_2_4_DEVFN, 8},
    {PCIE_GPP_2_5_DEVFN, 3},
    {PCIE_GPP_2_6_DEVFN, 9},

{PCIE_ABC_A_DEVFN,   10},
    {PCIE_GPP_B_DEVFN,   11},
    {PCIE_GPP_C_DEVFN,   12},
};