Change in coreboot[master]: mb/google/nautilus: Modify the XTDV = 210 due to different OSC from P...

[Andy Yeh (Code Review)]

Andy Yeh has uploaded this change for review. ( https://review.coreboot.org/24910

Change subject: mb/google/nautilus: Modify the XTDV = 210 due to different OSC from Poppy
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mb/google/nautilus: Modify the XTDV = 210 due to different OSC from Poppy

It is to change MCLK output in 19.2Mhz (currently 23.04Mhz) because
nautilus uses different OSC for TI PMIC.

According to PMIC datasheet (tps68470), the MCLK for camera depends on
the frequency of OSC. In poppy, the frequency of OSC is 20 MHz, the
PLL_REF_CLK = 20M / [XTDV (170) + 30] = 100kHz.
If we want to keep the PLL_REF_CLK in nautilus with 24 MHz OSC, we
should change XDTV to 210.

BUG=b:73987684
TEST: Verified the MIPI camera fps on DUT board.
TODO: If OEM will fix OSC on next build. This patch could be reverted.

Change-Id: Ia93bee1fc07434c13a5fa4227e100ddaff2de74a
Signed-off-by: Andy Yeh 
---
M src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/24910/1

diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
index b74fba9..3210da1d 100644
--- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
+++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
@@ -354,7 +354,13 @@
    				/* Set the PLL_REF_CLK cyles */
    				PSWR = 19
    				/* Set the reference crystal divider */
+					/* SW Workaround to generate 19.2Mhz
+					MCLK on Nautilus */
+#if IS_ENABLED(CONFIG_BOARD_GOOGLE_NAUTILUS)
+					XTDV = 210
+#else
    				XTDV = 170
+#endif
    				/* Set PLL feedback divider */
    				PLDV = 32
    				/* Set PLL output divider for HCLK_A */