Change in coreboot[master]: soc/intel/baytrail/southcluster.asl: Use consistent comment formatting

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48746 )

Change subject: soc/intel/baytrail/southcluster.asl: Use consistent comment formatting
......................................................................

soc/intel/baytrail/southcluster.asl: Use consistent comment formatting

Change-Id: I479e1eb5819c42621e8b17367b964124d5433378
Signed-off-by: Matt DeVillier 
---
M src/soc/intel/baytrail/acpi/southcluster.asl
1 file changed, 23 insertions(+), 23 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/48746/1

diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index f0fda15..a3417b4 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -37,118 +37,118 @@

Name (MCRS, ResourceTemplate()
 {
-	// Bus Numbers
+	/* Bus Numbers */
    WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
    		0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,, PB00)

-	// IO Region 0
+	/* IO Region 0 */
    DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
    		0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00)

-	// PCI Config Space
+	/* PCI Config Space */
    Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)

-	// IO Region 1
+	/* IO Region 1 */
    DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
    		0x0000, 0x0d00, 0xffff, 0x0000, 0xf300,,, PI01)

-	// VGA memory (0xa0000-0xbffff)
+	/* VGA memory (0xa0000-0xbffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
    		0x00020000,,, ASEG)

-	// OPROM reserved (0xc0000-0xc3fff)
+	/* OPROM reserved (0xc0000-0xc3fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
    		0x00004000,,, OPR0)

-	// OPROM reserved (0xc4000-0xc7fff)
+	/* OPROM reserved (0xc4000-0xc7fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
    		0x00004000,,, OPR1)

-	// OPROM reserved (0xc8000-0xcbfff)
+	/* OPROM reserved (0xc8000-0xcbfff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
    		0x00004000,,, OPR2)

-	// OPROM reserved (0xcc000-0xcffff)
+	/* OPROM reserved (0xcc000-0xcffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
    		0x00004000,,, OPR3)

-	// OPROM reserved (0xd0000-0xd3fff)
+	/* OPROM reserved (0xd0000-0xd3fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
    		0x00004000,,, OPR4)

-	// OPROM reserved (0xd4000-0xd7fff)
+	/* OPROM reserved (0xd4000-0xd7fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
    		0x00004000,,, OPR5)

-	// OPROM reserved (0xd8000-0xdbfff)
+	/* OPROM reserved (0xd8000-0xdbfff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
    		0x00004000,,, OPR6)

-	// OPROM reserved (0xdc000-0xdffff)
+	/* OPROM reserved (0xdc000-0xdffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
    		0x00004000,,, OPR7)

-	// BIOS Extension (0xe0000-0xe3fff)
+	/* BIOS Extension (0xe0000-0xe3fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
    		0x00004000,,, ESG0)

-	// BIOS Extension (0xe4000-0xe7fff)
+	/* BIOS Extension (0xe4000-0xe7fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
    		0x00004000,,, ESG1)

-	// BIOS Extension (0xe8000-0xebfff)
+	/* BIOS Extension (0xe8000-0xebfff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
    		0x00004000,,, ESG2)

-	// BIOS Extension (0xec000-0xeffff)
+	/* BIOS Extension (0xec000-0xeffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000ec000, 0x000effff, 0x00000000,
    		0x00004000,,, ESG3)

-	// System BIOS (0xf0000-0xfffff)
+	/* System BIOS (0xf0000-0xfffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
    		0x00010000,,, FSEG)

-	// LPEA Memory Region (0x20000000-0x201FFFFF)
+	/* LPEA Memory Region (0x20000000-0x201FFFFF) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x00000000, 0x00000000, 0x00000000,
    		0x00000000,,, LMEM)

-	// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS)
+	/* PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS) */
    DwordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x00000000, 0x00000000, 0x00000000,
                         0x00000000,,, PMEM)

-	// TPM Area (0xfed40000-0xfed44fff)
+	/* TPM Area (0xfed40000-0xfed44fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
@@ -259,7 +259,7 @@
 /* IRQ routing for each PCI device */
 #include "irqroute.asl"

-// PCI Express Ports 0:1c.x
+/* PCI Express Ports 0:1c.x */
 #include "pcie.asl"

Scope (_SB)
@@ -276,6 +276,6 @@
    /* SCC Devices */
    #include "scc.asl"

-	// LPE Device
+	/* LPE Device */
    #include "lpe.asl"
 }

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48746 )

Change subject: soc/intel/baytrail/southcluster.asl: Use consistent comment formatting
......................................................................

Patch Set 1: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48746 )

Change subject: soc/intel/baytrail/southcluster.asl: Use consistent comment formatting
......................................................................

Patch Set 1: Code-Review+2

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48746 )

Change subject: soc/intel/baytrail/southcluster.asl: Use consistent comment formatting
......................................................................

Patch Set 1: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48746 )

Change subject: soc/intel/baytrail/southcluster.asl: Use consistent comment formatting
......................................................................

soc/intel/baytrail/southcluster.asl: Use consistent comment formatting

Change-Id: I479e1eb5819c42621e8b17367b964124d5433378
Signed-off-by: Matt DeVillier 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48746
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Rudolph 
Reviewed-by: Angel Pons 
Reviewed-by: Michael Niewöhner 
---
M src/soc/intel/baytrail/acpi/southcluster.asl
1 file changed, 23 insertions(+), 23 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Rudolph: Looks good to me, approved
  Angel Pons: Looks good to me, approved
  Michael Niewöhner: Looks good to me, approved

diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index 05d6b0d..8c715d3 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -37,118 +37,118 @@

Name (MCRS, ResourceTemplate()
 {
-	// Bus Numbers
+	/* Bus Numbers */
    WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
    		0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,, PB00)

-	// IO Region 0
+	/* IO Region 0 */
    DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
    		0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00)

-	// PCI Config Space
+	/* PCI Config Space */
    Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)

-	// IO Region 1
+	/* IO Region 1 */
    DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
    		0x0000, 0x0d00, 0xffff, 0x0000, 0xf300,,, PI01)

-	// VGA memory (0xa0000-0xbffff)
+	/* VGA memory (0xa0000-0xbffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
    		0x00020000,,, ASEG)

-	// OPROM reserved (0xc0000-0xc3fff)
+	/* OPROM reserved (0xc0000-0xc3fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
    		0x00004000,,, OPR0)

-	// OPROM reserved (0xc4000-0xc7fff)
+	/* OPROM reserved (0xc4000-0xc7fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
    		0x00004000,,, OPR1)

-	// OPROM reserved (0xc8000-0xcbfff)
+	/* OPROM reserved (0xc8000-0xcbfff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
    		0x00004000,,, OPR2)

-	// OPROM reserved (0xcc000-0xcffff)
+	/* OPROM reserved (0xcc000-0xcffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
    		0x00004000,,, OPR3)

-	// OPROM reserved (0xd0000-0xd3fff)
+	/* OPROM reserved (0xd0000-0xd3fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
    		0x00004000,,, OPR4)

-	// OPROM reserved (0xd4000-0xd7fff)
+	/* OPROM reserved (0xd4000-0xd7fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
    		0x00004000,,, OPR5)

-	// OPROM reserved (0xd8000-0xdbfff)
+	/* OPROM reserved (0xd8000-0xdbfff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
    		0x00004000,,, OPR6)

-	// OPROM reserved (0xdc000-0xdffff)
+	/* OPROM reserved (0xdc000-0xdffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
    		0x00004000,,, OPR7)

-	// BIOS Extension (0xe0000-0xe3fff)
+	/* BIOS Extension (0xe0000-0xe3fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
    		0x00004000,,, ESG0)

-	// BIOS Extension (0xe4000-0xe7fff)
+	/* BIOS Extension (0xe4000-0xe7fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
    		0x00004000,,, ESG1)

-	// BIOS Extension (0xe8000-0xebfff)
+	/* BIOS Extension (0xe8000-0xebfff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
    		0x00004000,,, ESG2)

-	// BIOS Extension (0xec000-0xeffff)
+	/* BIOS Extension (0xec000-0xeffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000ec000, 0x000effff, 0x00000000,
    		0x00004000,,, ESG3)

-	// System BIOS (0xf0000-0xfffff)
+	/* System BIOS (0xf0000-0xfffff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
    		0x00010000,,, FSEG)

-	// LPEA Memory Region (0x20000000-0x201FFFFF)
+	/* LPEA Memory Region (0x20000000-0x201FFFFF) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x00000000, 0x00000000, 0x00000000,
    		0x00000000,,, LMEM)

-	// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS)
+	/* PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS) */
    DwordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0x00000000, 0x00000000, 0x00000000,
                         0x00000000,,, PMEM)

-	// TPM Area (0xfed40000-0xfed44fff)
+	/* TPM Area (0xfed40000-0xfed44fff) */
    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    		Cacheable, ReadWrite,
    		0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
@@ -259,7 +259,7 @@
 /* IRQ routing for each PCI device */
 #include "irqroute.asl"

-// PCI Express Ports 0:1c.x
+/* PCI Express Ports 0:1c.x */
 #include "pcie.asl"

Scope (_SB)
@@ -276,7 +276,7 @@
    /* SCC Devices */
    #include "scc.asl"

-	// LPE Device
+	/* LPE Device */
    #include "lpe.asl"
 }