[M] Change in coreboot[master]: soc/intel/xeon_sp: Add DMAR IOAPIC entries based on HW

[Arthur Heymans (Code Review)]

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Tim Chu.

Hello Jonathan Zhang, Johnny Lin, Christian Walter, Tim Chu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/70270

to look at the new patch set (#3).

Change subject: soc/intel/xeon_sp: Add DMAR IOAPIC entries based on HW
......................................................................

soc/intel/xeon_sp: Add DMAR IOAPIC entries based on HW

Instead of guessing how FSP has set up IOAPIC IDs read it back from
hardware. This is more robust.

Change-Id: If90873ac94261e424d1713bdab137eaceb256bba
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/xeon_sp/cpx/soc_util.c
M src/soc/intel/xeon_sp/include/soc/util.h
M src/soc/intel/xeon_sp/nb_acpi.c
M src/soc/intel/xeon_sp/skx/soc_util.c
4 files changed, 22 insertions(+), 50 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/70270/3