Attention is currently required from: Lee Leahy, Huang Jin, Patrick Rudolph. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55064 )
Change subject: drivers/intel/fsp1_1/romstage.c: Remove MCU update ......................................................................
drivers/intel/fsp1_1/romstage.c: Remove MCU update
On Braswell this is done in the bootblock before C code is executed.
Change-Id: I72c7b821e04169ae237d8adb6a8348f06e87b047 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/drivers/intel/fsp1_1/romstage.c 1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/55064/1
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index ff03805..62b112a 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -103,10 +103,6 @@
timestamp_add_now(TS_START_ROMSTAGE);
- /* Load microcode before RAM init */ - if (CONFIG(SUPPORT_CPU_UCODE_IN_CBFS)) - intel_update_microcode_from_cbfs(); - /* Display parameters */ if (!CONFIG(NO_MMCONF_SUPPORT)) printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",