Change in coreboot[master]: soc/amd: rename sb_init_acpi_ports tofch_init_acpi_ports

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50209 )

Change subject: soc/amd: rename sb_init_acpi_ports tofch_init_acpi_ports
......................................................................

soc/amd: rename sb_init_acpi_ports tofch_init_acpi_ports

There's no dedicated south bridge any more and now we have integrated
FCHs in the SoCs.

Signed-off-by: Felix Held 
Change-Id: I19126da09f034f51b134f8d6ae2006f57fac1b0d
---
M src/soc/amd/picasso/fch.c
M src/soc/amd/stoneyridge/southbridge.c
2 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/50209/1

diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index fa99db8..e6cd51a 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -115,7 +115,7 @@
    }
 }

-static void sb_init_acpi_ports(void)
+static void fch_init_acpi_ports(void)
 {
    u32 reg;

@@ -220,7 +220,7 @@
 void fch_init(void *chip_info)
 {
    i2c_soc_init();
-	sb_init_acpi_ports();
+	fch_init_acpi_ports();

acpi_pm_gpe_add_events_print_events();
    gpio_add_events();
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 2a91596..2a78ff9 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -356,7 +356,7 @@
    printk(BIOS_DEBUG, "%s\n", __func__);
 }

-static void sb_init_acpi_ports(void)
+static void fch_init_acpi_ports(void)
 {
    u32 reg;

@@ -406,7 +406,7 @@
 {
    struct chipset_power_state *state;

-	sb_init_acpi_ports();
+	fch_init_acpi_ports();

state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
    if (state) {