Change in coreboot[master]: soc/amd/psp_verstage: Init TPM on S0i3 resume

[Rob Barnes (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/58870

to look at the new patch set (#3).

Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume
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soc/amd/psp_verstage: Init TPM on S0i3 resume

Add option to initialize the TPM in PSP verstage during s0i3 resume.
This is needed if the TPM is reset in s0i3. FSDL is handling
restoring everything else, so only the minimum TPM initialization is done.

BUG=b:200578885
TEST=Multiple cycles of S0i3 suspend resume. ~50ms of additional delay.
BRANCH=None

Change-Id: Ie511928da6a8b4be62621fd2c4c31a8d1e724d48
Signed-off-by: Rob Barnes 
---
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/guybrush/verstage.c
M src/security/vboot/vboot_common.h
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/common/psp_verstage/fch.c
M src/soc/amd/common/psp_verstage/include/psp_verstage.h
M src/soc/amd/common/psp_verstage/psp_verstage.c
M src/vendorcode/google/chromeos/Kconfig
9 files changed, 109 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/58870/3