Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
mb/purism/librem_mini: drop unused HeciEnabled register
this should have been corrected as part of: 3de90d1 [soc/intel/cnl: Set Heci1Disable depending on devicetree config]
Change-Id: I6a103a1de01fc258ef359258a8a64f4c5a181139 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/47187/1
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb index 9d2b34b..ae19b04 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb @@ -204,10 +204,7 @@ device pci 15.1 off end # I2C #1 device pci 15.2 off end # I2C #2 device pci 15.3 off end # I2C #3 - device pci 16.0 off # Management Engine Interface 1 - # HECI must be enabled w/HAP disable else S3 issues - register "HeciEnabled" = "1" - end + device pci 16.0 off end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/47187/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47187/1//COMMIT_MSG@10 PS1, Line 10: 3de90d1 Please write it as `commit 3de90d1`, in a single line
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47187
to look at the new patch set (#2).
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
mb/purism/librem_mini: drop unused HeciEnabled register
this should have been corrected as part of: commit 3de90d1 [soc/intel/cnl: Set Heci1Disable depending on devicetree config]
Change-Id: I6a103a1de01fc258ef359258a8a64f4c5a181139 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/47187/2
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47187/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47187/1//COMMIT_MSG@10 PS1, Line 10: 3de90d1
Please write it as `commit 3de90d1`, in a single line
Done
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47187
to look at the new patch set (#3).
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
mb/purism/librem_mini: drop unused HeciEnabled register
this should have been corrected as part of: commit 3de90d1 [soc/intel/cnl: Set Heci1Disable depending on devicetree config]
Change-Id: I6a103a1de01fc258ef359258a8a64f4c5a181139 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/47187/3
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
Patch Set 3: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
mb/purism/librem_mini: drop unused HeciEnabled register
this should have been corrected as part of: commit 3de90d1 [soc/intel/cnl: Set Heci1Disable depending on devicetree config]
Change-Id: I6a103a1de01fc258ef359258a8a64f4c5a181139 Signed-off-by: Matt DeVillier matt.devillier@puri.sm Reviewed-on: https://review.coreboot.org/c/coreboot/+/47187 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Michael Niewöhner foss@mniewoehner.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 1 insertion(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb index 9d2b34b..ae19b04 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb @@ -204,10 +204,7 @@ device pci 15.1 off end # I2C #1 device pci 15.2 off end # I2C #2 device pci 15.3 off end # I2C #3 - device pci 16.0 off # Management Engine Interface 1 - # HECI must be enabled w/HAP disable else S3 issues - register "HeciEnabled" = "1" - end + device pci 16.0 off end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Michael Niewöhner (Code Review)