[S] Change in coreboot[master]: mb/google/brya/var/mithrax: adjust I2C5 times for TP

[John Su (Code Review)]

Attention is currently required from: Frank Wu, John Su, Tarun Tuli, YH Lin, Subrata Banik, Tim Wawrzynczak, Nick Vaccaro.

Hello Frank Wu, build bot (Jenkins), Tarun Tuli, YH Lin, Dtrain Hsu, Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Ricky Chang,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/67920

to look at the new patch set (#4).

Change subject: mb/google/brya/var/mithrax: adjust I2C5 times for TP
......................................................................

mb/google/brya/var/mithrax: adjust I2C5 times for TP

This change updates scl_lcnt, scl_hcnt, sda_hold value for I2C5 to
follow I2C specification.

I2C_TCHPAD_SCL high period time is from 0.53 us to 0.6952 us.
I2C_TCHPAD_SDA hold time is from 0.13 us to 0.4623 us.

BUG=b:249031186
BRANCH=brya
TEST=emerge-brya coreboot chromeos-bootimage

Signed-off-by: John Su 
Change-Id: I5977f0dbba8924cc8a1c72c36358d6ba6f2de940
---
M src/mainboard/google/brya/variants/mithrax/overridetree.cb
1 file changed, 26 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/67920/4