[L] Change in coreboot[main]: soc/intel/xeon_sp: Merge SKX and CPX

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Morgan Jang, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85557?usp=email )

Change subject: soc/intel/xeon_sp: Merge SKX and CPX
......................................................................

Patch Set 5: Code-Review+1

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/85557/comment/e47993da_6c4932bf?usp... :
PS5, Line 10: - Create a new 14nm folder
> Agree that 14nm covers SKX and CPX more accurately. […]

At a second thought, maybe we could accept both - SKX/CPX common codes in 14nm folder, while other gen's common codes laid flatly in xeon_sp top directory. It would be helpful to have a README.md in 14nm folder to specify the background of the naming.

File src/soc/intel/xeon_sp/cpx/Kconfig:

https://review.coreboot.org/c/coreboot/+/85557/comment/8ba9e574_cfa97310?usp... :
PS5, Line 5: 	select SOC_INTEL_XEON_SP_14NM
> @shuo.liu@intel. […]

CPX is gen3.