Change in ...coreboot[master]: soc/intel/cannonlake: Remove DMA support for PTT - coreboot-gerrit

12 Feb 2019


      Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27176 )
Change subject: soc/intel/cannonlake: Remove DMA support for PTT
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Patch Set 3:
I am running into an issue on Whiskey Lake-U where the calculated reserved memory in coreboot is different from the calculated reserved memory in the FSP by 0x1000. Reverting this change fixes this miscalculation. Is it possible that this needs to be reinstated on some systems?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I11993cef77fd5e879eedabc1ed344f91f8257c90
Gerrit-Change-Number: 27176
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik subrata.banik@intel.com
Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com
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Gerrit-Comment-Date: Tue, 12 Feb 2019 22:29:46 +0000
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