12 Feb
2019
12 Feb
'19
10:29 p.m.
Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27176 )
Change subject: soc/intel/cannonlake: Remove DMA support for PTT ......................................................................
Patch Set 3:
I am running into an issue on Whiskey Lake-U where the calculated reserved memory in coreboot is different from the calculated reserved memory in the FSP by 0x1000. Reverting this change fixes this miscalculation. Is it possible that this needs to be reinstated on some systems?
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