Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38978 )
Change subject: [WIP] mb/acer: Add Acer Aspire ES1-572 ......................................................................
Patch Set 7:
(6 comments)
https://review.coreboot.org/c/coreboot/+/38978/5/src/mainboard/acer/es1-572/... File src/mainboard/acer/es1-572/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/38978/5/src/mainboard/acer/es1-572/... PS5, Line 223: register "SendVrMbxCmd" = "2" I never found documentation on that PS4 exit issue; how did you verify this isn't required here?
https://review.coreboot.org/c/coreboot/+/38978/7/src/mainboard/acer/es1-572/... File src/mainboard/acer/es1-572/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/38978/7/src/mainboard/acer/es1-572/... PS7, Line 37: register "SataTestMode" = "1" huh? why is test mode on?
https://review.coreboot.org/c/coreboot/+/38978/7/src/mainboard/acer/es1-572/... PS7, Line 40: register "SataPortsDevSlp[0]" = "0" : register "SataPortsDevSlp[1]" = "0" : drop disabled options - or enable devsleep cap if the board supports it (haven't checked the schematics, yet)
https://review.coreboot.org/c/coreboot/+/38978/7/src/mainboard/acer/es1-572/... PS7, Line 86: register "usb2_ports[3]" = "USB2_PORT_EMPTY" # N/C not required anymore; drop; see CB:45106
https://review.coreboot.org/c/coreboot/+/38978/7/src/mainboard/acer/es1-572/... PS7, Line 93: register "usb3_ports[1]" = "USB3_PORT_EMPTY" # N/C : register "usb3_ports[2]" = "USB3_PORT_EMPTY" # N/C : register "usb3_ports[3]" = "USB3_PORT_EMPTY" # N/C : not required anymore; drop them; see CB:45106
https://review.coreboot.org/c/coreboot/+/38978/7/src/mainboard/acer/es1-572/... PS7, Line 108: device pci 04.0 off end # CPU Thermal Subsystem why off?
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Michael Niewöhner (Code Review)