Attention is currently required from: Subrata Banik, Paul Menzel.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73310 )
Change subject: device/pciexp_device.c: Do not enable common clock if already active
......................................................................
Patch Set 1:
(1 comment)
File src/device/pciexp_device.c:
https://review.coreboot.org/c/coreboot/+/73310/comment/d5770e1a_aa42c1c0
PS1, Line 205: printk(BIOS_INFO, "Common Clock Configuration already enabled\n");
PCIe: Common Clock Configuration already enabled, so skip it
Paul, this can sound confusing as "so skip it" actually refers to skip the CCC enablement. I would rather prefer a the used phrasing as it is a clear statement and implies that the feature will stay enabled.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/73310
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I747fa406a120a215de189d7252f160c8ea2e3716
Gerrit-Change-Number: 73310
Gerrit-PatchSet: 1
Gerrit-Owner: Werner Zeh
werner.zeh@siemens.com
Gerrit-Reviewer: Subrata Banik
subratabanik@google.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-Attention: Subrata Banik
subratabanik@google.com
Gerrit-Attention: Paul Menzel
paulepanter@mailbox.org
Gerrit-Comment-Date: Wed, 01 Mar 2023 09:34:44 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Subrata Banik
subratabanik@google.com
Comment-In-Reply-To: Paul Menzel
paulepanter@mailbox.org
Comment-In-Reply-To: Werner Zeh
werner.zeh@siemens.com
Gerrit-MessageType: comment