the following patch was just integrated into master: commit c00f4d669dd03bf5a4ee8c255bb71fc86f229239 Author: Timothy Pearson tpearson@raptorengineeringinc.com Date: Wed Mar 30 13:07:47 2016 -0500
nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEs
During power on from cold (S5) state, numerous MCEs are generated before DRAM training starts, e.g. during HT link training. Clear these MCEs before DRAM training start, and report any MCEs generated during DRAM training.
Change-Id: I7d047571242e5bd041e4aac22c1ec1d7d26ef0e6 Signed-off-by: Timothy Pearson tpearson@raptorengineeringinc.com Reviewed-on: https://review.coreboot.org/14191 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth martinroth@google.com Tested-by: Raptor Engineering Automated Test Stand noreply@raptorengineeringinc.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net
See https://review.coreboot.org/14191 for details.
-gerrit