Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51704
to look at the new patch set (#5).
Change subject: soc/intel/alderlake: Align RcompResistor definition as per MRC ......................................................................
soc/intel/alderlake: Align RcompResistor definition as per MRC
List of changes: 1. Alder Lake MRC is expecting a RcompResistor value of word width. Reference RCOMP resistors on motherboard are ~ 100 Ohms but coreboot is passing an array of RcompResistor which is not completely in use.
2. Also, remove usage of '&' with memcpy the required value into RcompTarget array.
3. Also, update RcompResistor value for ADLRVP.
BUG=b:183341229 TEST=Enable FSP debug log to verify the override value for RcompResistor is reflecting correctly.
Change-Id: I69c7cec55b65036fc039c33374a3fd363ef7004e Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/memory.c M src/soc/intel/alderlake/include/soc/meminit.h M src/soc/intel/alderlake/meminit.c 3 files changed, 6 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/51704/5