Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33402
Change subject: util/superiotool: clarify usage of MISC and NANA defines ......................................................................
util/superiotool: clarify usage of MISC and NANA defines
Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M util/superiotool/superiotool.h 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/33402/1
diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 1a10fb6..d6e150f 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -127,9 +127,10 @@
#define EOT -1 /* End Of Table */ #define NOLDN -2 /* NO LDN needed */ -#define NANA -3 /* Not Available */ +#define NANA -3 /* Not Available: Used for GPIO input value registers. */ #define RSVD -4 /* Reserved */ -#define MISC -5 /* Needs special comment in output */ +#define MISC -5 /* Needs special comment in output: + Used for registers depending on external pin straps. */ #define MAXLDN 0x14 /* Biggest LDN */ #define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */ #define MAXNUMIDX 170 /* Maximum number of indices */
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33402 )
Change subject: util/superiotool: clarify usage of MISC and NANA defines ......................................................................
Patch Set 1: Code-Review+1
(2 comments)
https://review.coreboot.org/#/c/33402/1/util/superiotool/superiotool.h File util/superiotool/superiotool.h:
https://review.coreboot.org/#/c/33402/1/util/superiotool/superiotool.h@130 PS1, Line 130: Used for I suppose this is just an example, so prefix with e.g.? or make it more general `registers that reflect the state of input pins`
https://review.coreboot.org/#/c/33402/1/util/superiotool/superiotool.h@133 PS1, Line 133: Used for registers depending on external pin straps. */ e.g. ... ?
Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33402
to look at the new patch set (#2).
Change subject: util/superiotool: clarify usage of MISC and NANA defines ......................................................................
util/superiotool: clarify usage of MISC and NANA defines
Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M util/superiotool/superiotool.h 1 file changed, 8 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/33402/2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33402 )
Change subject: util/superiotool: clarify usage of MISC and NANA defines ......................................................................
Patch Set 2: Code-Review+2
Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33402 )
Change subject: util/superiotool: clarify usage of MISC and NANA defines ......................................................................
util/superiotool: clarify usage of MISC and NANA defines
Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8 Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/33402 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M util/superiotool/superiotool.h 1 file changed, 8 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 1a10fb6..6e59933 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -127,9 +127,15 @@
#define EOT -1 /* End Of Table */ #define NOLDN -2 /* NO LDN needed */ -#define NANA -3 /* Not Available */ +#define NANA -3 /* Not Available: + Used for registers having externally controlled + values that can change during runtime like + GPIO input value registers. */ #define RSVD -4 /* Reserved */ -#define MISC -5 /* Needs special comment in output */ +#define MISC -5 /* Needs special comment in output: + Used for registers depending on external pin straps + configuring static, but board-specific settings like + SIO base address or AMD/Intel power seqencing type. */ #define MAXLDN 0x14 /* Biggest LDN */ #define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */ #define MAXNUMIDX 170 /* Maximum number of indices */
-
Felix Held (Code Review) -
Nico Huber (Code Review)