[M] Change in coreboot[main]: soc/mediatek: PCI: Fix translation window

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Nico Huber, Paul Menzel, Yidi Lin.

Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78044?usp=email )

Change subject: soc/mediatek: PCI: Fix translation window
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Patch Set 12:

(3 comments)

File src/soc/mediatek/common/pcie.c:

https://review.coreboot.org/c/coreboot/+/78044/comment/c9b4931e_f980276e :
PS8, Line 174: __fls
> We still need the 'size' to calculate addresses.

Right.

File src/soc/mediatek/common/pcie.c:

https://review.coreboot.org/c/coreboot/+/78044/comment/452ae6ed_d9e9748b :
PS12, Line 167: 	while (remaining && *count < PCIE_MAX_TRANS_TABLES) {
Add comment

```
/* The table size needs to be a power of 2.
   In addition, cpu_addr needs to be aligned to the size. */
```

https://review.coreboot.org/c/coreboot/+/78044/comment/0bac00eb_b1412f36 :
PS12, Line 175: remaining
table