Change in coreboot[master]: cpu/amd/family_10h-family_15h: Make CAR setup compile

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62077 )

Change subject: cpu/amd/family_10h-family_15h: Make CAR setup compile
......................................................................

cpu/amd/family_10h-family_15h: Make CAR setup compile

Signed-off-by: Michał Żygowski 
Change-Id: I2aec84a34819bc7e58819d2be16c469d560318ce
---
M src/cpu/amd/family_10h-family_15h/Kconfig
M src/cpu/amd/family_10h-family_15h/Makefile.inc
A src/cpu/amd/family_10h-family_15h/bootblock.c
R src/cpu/amd/family_10h-family_15h/cache_as_ram.S
M src/cpu/amd/socket_G34/Makefile.inc
5 files changed, 40 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/62077/1

diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig
index 121d677..2b6b6d9 100644
--- a/src/cpu/amd/family_10h-family_15h/Kconfig
+++ b/src/cpu/amd/family_10h-family_15h/Kconfig
@@ -37,7 +37,7 @@
    hex
    default 0x0c000

-config DCACHE_BSP_TOP_STACK_SIZE
+config DCACHE_BSP_STACK_SIZE
    hex
    default 0x4000

diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc
index 7035323..3fa9171 100644
--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc
+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc
@@ -1,3 +1,6 @@
+bootblock-y += bootblock.c
+bootblock-y += cache_as_ram.S
+
 romstage-y += ../../x86/mtrr/earlymtrr.c
 romstage-y += ../car/post_cache_as_ram.c

diff --git a/src/cpu/amd/family_10h-family_15h/bootblock.c b/src/cpu/amd/family_10h-family_15h/bootblock.c
new file mode 100644
index 0000000..dd9a772
--- /dev/null
+++ b/src/cpu/amd/family_10h-family_15h/bootblock.c
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <arch/bootblock.h>
+#include <cpu/x86/bist.h>
+
+static uint32_t saved_bist;
+
+asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
+{
+	saved_bist = bist;
+	/* Call lib/bootblock.c main */
+	bootblock_main_with_basetime(base_timestamp);
+}
+
+void __weak bootblock_early_northbridge_init(void) { }
+void __weak bootblock_early_southbridge_init(void) { }
+void __weak bootblock_early_cpu_init(void) { }
+
+void bootblock_soc_early_init(void)
+{
+	bootblock_early_northbridge_init();
+	bootblock_early_southbridge_init();
+	bootblock_early_cpu_init();
+}
+
+void bootblock_soc_init(void)
+{
+	/* Halt if there was a built in self test failure */
+	report_bist_failure(saved_bist);
+}
diff --git a/src/cpu/amd/family_10h-family_15h/cache_as_ram.inc b/src/cpu/amd/family_10h-family_15h/cache_as_ram.S
similarity index 98%
rename from src/cpu/amd/family_10h-family_15h/cache_as_ram.inc
rename to src/cpu/amd/family_10h-family_15h/cache_as_ram.S
index 2054ea3..0b353df 100644
--- a/src/cpu/amd/family_10h-family_15h/cache_as_ram.inc
+++ b/src/cpu/amd/family_10h-family_15h/cache_as_ram.S
@@ -15,10 +15,11 @@
 #include <cpu/x86/cache.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
+#include <cpu/x86/post_code.h>

#define CacheSize		CONFIG_DCACHE_RAM_SIZE
 #define CacheBase		CONFIG_DCACHE_RAM_BASE
-#define CacheSizeBSPStack	CONFIG_DCACHE_BSP_TOP_STACK_SIZE
+#define CacheSizeBSPStack	CONFIG_DCACHE_BSP_STACK_SIZE
 #define CacheSizeBSPSlush	CONFIG_DCACHE_BSP_TOP_STACK_SLUSH

/* For CAR with Fam10h. */
@@ -41,7 +42,8 @@
  *   xmm4: Backup EBX
  *   xmm5: coreboot init detect
  */
-
+.global bootblock_pre_c_entry
+bootblock_pre_c_entry:
    /* Save the BIST result. */
    movl	%eax, %ebp

@@ -590,12 +592,7 @@

post_code(0xa7)

-	call	cache_as_ram_main
-
-	call	post_cache_as_ram
-	movl	%eax, %esp
-
-	call	cache_as_ram_new_stack
+	call	bootblock_c_entry_bist

/* We will not go back. */

diff --git a/src/cpu/amd/socket_G34/Makefile.inc b/src/cpu/amd/socket_G34/Makefile.inc
index de33cd3..0bb0844 100644
--- a/src/cpu/amd/socket_G34/Makefile.inc
+++ b/src/cpu/amd/socket_G34/Makefile.inc
@@ -10,5 +10,3 @@
 subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
-
-cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc