Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35444 )
Change subject: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding ......................................................................
mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding
Drop unused CNF2_LPC_EN, as there is no device which uses IO 0x4e/4f.
Do not use the mainboard model to set COMA_LPC_EN. Make use of NO_UART_ON_SUPERIO instead, as it is more future-proof.
Change-Id: Iac49250b0f509a42012f82db8aa85ba85559c66f Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c 1 file changed, 4 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/35444/1
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c index 27fbb2c..a51595f 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c @@ -25,14 +25,11 @@
void pch_enable_lpc(void) { - if (CONFIG(BOARD_GIGABYTE_GA_H61M_S2PV)) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | - CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); - pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); + pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | CNF1_LPC_EN);
- } else if (CONFIG(BOARD_GIGABYTE_GA_H61MA_D3V)) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | - CNF1_LPC_EN); + if (!CONFIG(NO_UART_ON_SUPERIO)) { + pci_or_config16(PCH_LPC_DEV, LPC_EN, COMA_LPC_EN); + pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); } }
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35444 )
Change subject: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/35444/1/src/mainboard/gigabyte/ga-h... File src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c:
https://review.coreboot.org/c/coreboot/+/35444/1/src/mainboard/gigabyte/ga-h... PS1, Line 32: pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); COMA should work without this line, I guess. It just moves COMB to 0x2f80 (which should only matter if COMB decoding would be activated).
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35444 )
Change subject: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35444/1/src/mainboard/gigabyte/ga-h... File src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c:
https://review.coreboot.org/c/coreboot/+/35444/1/src/mainboard/gigabyte/ga-h... PS1, Line 32: pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
COMA should work without this line, I guess. It just moves COMB to 0x2f80 […]
Sorry, didn't mean to leave this unresolved (and it's 0x2f8 ofc.).
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35444 )
Change subject: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35444/1/src/mainboard/gigabyte/ga-h... File src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c:
https://review.coreboot.org/c/coreboot/+/35444/1/src/mainboard/gigabyte/ga-h... PS1, Line 32: pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
Sorry, didn't mean to leave this unresolved (and it's 0x2f8 ofc.).
yeah, I think it should work fine without it, but I once had issues with overlapping decode ranges, so better safe than sorry I guess
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35444 )
Change subject: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding ......................................................................
mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding
Drop unused CNF2_LPC_EN, as there is no device which uses IO 0x4e/4f.
Do not use the mainboard model to set COMA_LPC_EN. Make use of NO_UART_ON_SUPERIO instead, as it is more future-proof.
Change-Id: Iac49250b0f509a42012f82db8aa85ba85559c66f Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35444 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c 1 file changed, 4 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c index 27fbb2c..a51595f 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c @@ -25,14 +25,11 @@
void pch_enable_lpc(void) { - if (CONFIG(BOARD_GIGABYTE_GA_H61M_S2PV)) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | - CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); - pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); + pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | CNF1_LPC_EN);
- } else if (CONFIG(BOARD_GIGABYTE_GA_H61MA_D3V)) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | - CNF1_LPC_EN); + if (!CONFIG(NO_UART_ON_SUPERIO)) { + pci_or_config16(PCH_LPC_DEV, LPC_EN, COMA_LPC_EN); + pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); } }