Attention is currently required from: Anil Kumar K, Jérémy Compostella, Krishna P Bhat D, Rizwan Qureshi, sridhar siricilla.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77069?usp=email )
Change subject: soc/intel/cse: Implement APIs to access PSR backup status in CMOS
......................................................................
Patch Set 9:
(2 comments)
File src/soc/intel/common/block/cse/cse_lite_cmos.c:
https://review.coreboot.org/c/coreboot/+/77069/comment/7756d42b_23755acb :
PS7, Line 113: int8_t
kept it int8_t as value is either 1 or 0
Acknowledged
File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/77069/comment/24e9d4ad_aa1c6da1 :
PS7, Line 176: int8_t
int8_t as the value if either 0 or 1
Acknowledged
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