[M] Change in coreboot[main]: soc/mediatek/mt8189: Add USB host support

[Yidi Lin (Code Review)]

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87021?usp=email )

Change subject: soc/mediatek/mt8189: Add USB host support
......................................................................

soc/mediatek/mt8189: Add USB host support

Correct XHCI and PHY register addresses and enable USB port 3 VBUS
to support USB host functionality.

BUG=b:379008996
BRANCH=none
TEST=build pass

Signed-off-by: Liu Liu 
Change-Id: I5f1b4b3eb178cb9a110b97a2763c8cff5cdf0ddd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87021
Reviewed-by: Yidi Lin 
Reviewed-by: Yu-Ping Wu 
Tested-by: build bot (Jenkins) 
---
M src/soc/mediatek/mt8189/Makefile.mk
M src/soc/mediatek/mt8189/include/soc/addressmap.h
A src/soc/mediatek/mt8189/include/soc/usb.h
A src/soc/mediatek/mt8189/usb.c
4 files changed, 49 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Yidi Lin: Looks good to me, approved
  Yu-Ping Wu: Looks good to me, approved

diff --git a/src/soc/mediatek/mt8189/Makefile.mk b/src/soc/mediatek/mt8189/Makefile.mk
index 00489c0..6774f52 100644
--- a/src/soc/mediatek/mt8189/Makefile.mk
+++ b/src/soc/mediatek/mt8189/Makefile.mk
@@ -17,6 +17,7 @@

ramstage-y += emi.c
 ramstage-y += soc.c
+ramstage-y += ../common/usb.c usb.c

CPPFLAGS_common += -Isrc/soc/mediatek/mt8189/include
 CPPFLAGS_common += -Isrc/soc/mediatek/common/include
diff --git a/src/soc/mediatek/mt8189/include/soc/addressmap.h b/src/soc/mediatek/mt8189/include/soc/addressmap.h
index c0c78b1..5d99728 100644
--- a/src/soc/mediatek/mt8189/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8189/include/soc/addressmap.h
@@ -30,8 +30,9 @@
    SFLASH_REG_BASE			= IO_PHYS + 0x01018000,
    PERICFG_AO_BASE			= IO_PHYS + 0x01036000,
    DEVAPC_PERI_PAR_AO_BASE		= IO_PHYS + 0x0103C000,
-	SSUSB_IPPC_BASE			= IO_PHYS + 0x01203E00,
+	SSUSB_IPPC_BASE			= IO_PHYS + 0x01263E00,
    UFSHCI_BASE			= IO_PHYS + 0x012B0000,
+	SSUSB_SIF_BASE			= IO_PHYS + 0x01B00300,
    MIPITX0_BASE			= IO_PHYS + 0x01B40000,
    IOCFG_LM_BASE			= IO_PHYS + 0x01B50000,
    EDP_BASE			= IO_PHYS + 0x01B70000,
@@ -42,7 +43,6 @@
    IOCFG_BM2_BASE			= IO_PHYS + 0x01D40000,
    IOCFG_LT0_BASE			= IO_PHYS + 0x01E20000,
    IOCFG_LT1_BASE			= IO_PHYS + 0x01E30000,
-	SSUSB_SIF_BASE			= IO_PHYS + 0x01E80300,
    IOCFG_RT_BASE			= IO_PHYS + 0x01F20000,
    DSI0_BASE			= IO_PHYS + 0x04016000,
    DISP_DVO0			= IO_PHYS + 0x04019000,
diff --git a/src/soc/mediatek/mt8189/include/soc/usb.h b/src/soc/mediatek/mt8189/include/soc/usb.h
new file mode 100644
index 0000000..eba4d62
--- /dev/null
+++ b/src/soc/mediatek/mt8189/include/soc/usb.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8189 Functional Specification
+ * Chapter number: 9.5
+ */
+
+#ifndef SOC_MEDIATEK_MT8189_INCLUDE_SOC_USB_H
+#define SOC_MEDIATEK_MT8189_INCLUDE_SOC_USB_H
+
+#include <soc/usb_common.h>
+
+struct ssusb_sif_port {
+	struct sif_u2_phy_com u2phy;
+	u32 reserved0[64 * 5];
+	struct sif_u3phyd u3phyd;
+	u32 reserved1[64];
+	struct sif_u3phya u3phya;
+	struct sif_u3phya_da u3phya_da;
+	u32 reserved2[64 * 3];
+};
+check_member(ssusb_sif_port, u3phyd, 0x600);
+check_member(ssusb_sif_port, u3phya, 0x800);
+check_member(ssusb_sif_port, u3phya_da, 0x900);
+check_member(ssusb_sif_port, reserved2, 0xa00);
+
+#define USB_PORT_NUMBER		1
+
+#endif
diff --git a/src/soc/mediatek/mt8189/usb.c b/src/soc/mediatek/mt8189/usb.c
new file mode 100644
index 0000000..4dde3de
--- /dev/null
+++ b/src/soc/mediatek/mt8189/usb.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8189 Functional Specification
+ * Chapter number: 9.5
+ */
+
+#include <device/mmio.h>
+#include <gpio.h>
+#include <soc/pll_common.h>
+#include <soc/usb.h>
+
+void mtk_usb_prepare(void)
+{
+	/* enable P3 VBUS */
+	gpio_output(GPIO(USB3_DRV_VBUS), 1);
+}