Change in coreboot[master]: mb/google/brya/var/brask: Enable RTL8125

[Alan Huang (Code Review)]

Alan Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58105 )

Change subject: mb/google/brya/var/brask: Enable RTL8125
......................................................................

mb/google/brya/var/brask: Enable RTL8125

Update the GPIOs and parameters of RTL8125 in the devicetree.

Add config RT8168_GET_MAC_FROM_VPD and RT8168_SET_LED_MODE for
brask to apply the RT8168 driver (r8168.c) which contains
functions to read MAC address and customize the LED settings.

BUG=b:193750191
BRANCH=None
TEST=build pass

Change-Id: I2e82dbc1e6c68cbd84b603adc7fdc3ee1d4d3392
Signed-off-by: Alan Huang 
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/brask/overridetree.cb
2 files changed, 14 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/58105/1

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index e6e44e2..69bad5c 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -7,6 +7,8 @@
 config BOARD_GOOGLE_BASEBOARD_BRASK
    def_bool n
    select SPD_CACHE_IN_FMAP
+	select RT8168_GET_MAC_FROM_VPD
+	select RT8168_SET_LED_MODE

if BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK

diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb
index e707a9b..dfcc102 100644
--- a/src/mainboard/google/brya/variants/brask/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brask/overridetree.cb
@@ -1,6 +1,18 @@
 chip soc/intel/alderlake

device domain 0 on
+		device ref pcie_rp7 on
+			chip drivers/net
+				register "customized_leds" = "0x05af"
+				# register "wake" = "GPE0_DW1_07"
+				register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H22)"
+				register "stop_delay_ms" = "12" # NIC needs time to quiesce
+				register "stop_off_delay_ms" = "1"
+				register "has_power_resource" = "1"
+				register "device_index" = "0"
+				device pci 00.0 on end
+			end
+		end # RTL8125 Ethernet NIC
    end

end