Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c 1 file changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/1
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 247e60a..d7fd21b 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -294,6 +294,35 @@ return 1; }
+static int cse_check_opmode_soft_temp_disable(void) +{ + union me_hfsts1 hfs1; + + hfs1.data = me_read_config32(PCI_ME_HFSTS1); + + if (hfs1.fields.operation_mode == ME_HFS_TEMP_DISABLE) + return 1; + else + return 0; +} + +/* + * Polls for CSE's operation mode 'Soft Temporary Disable'. + * The CSE enters the operation mode when it boots from RO_BP1 region. + */ +uint8_t cse_wait_opmode_soft_temp_disable(void) +{ + struct stopwatch sw; + stopwatch_init_msecs_expire(&sw, HECI_DELAY_READY); + while (!check_cse_opmode_soft_disable_state()) { + udelay(HECI_DELAY); + if (stopwatch_expired(&sw)) + return 0; + } + + return 1; +} + static int wait_heci_ready(void) { struct stopwatch sw;
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#2).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 34 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/2
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#6).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 34 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/6
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#7).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/7
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#11).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/11
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#12).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/12
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#13).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/13
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#14).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=P:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c 1 file changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/14
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#15).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c 1 file changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/15
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 317: cse_wait_opmode_soft_temp_disable no declaration in the header file
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
Patch Set 16:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 317: uint8_t Why this data type? Please use CB_SUCCESS and friends.
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 325: } As you have the stopwatch, please print out the time it took as a debug or spew level message.
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#17).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/17
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
Patch Set 17:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 317: cse_wait_opmode_soft_temp_disable
no declaration in the header file
Done
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#18).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/18
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#20).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/20
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
Patch Set 20:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 325: }
As you have the stopwatch, please print out the time it took as a debug or spew level message.
Done
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#23).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_opmode_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_opmode_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/23
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#24).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_com_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/24
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#25).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
* cse_check_com_soft_temp_disable() - It reads CSE's FWSTS1 register and checks for CSE's operation mode 'Soft Temporary Disable'.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/25
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#28).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/28
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#32).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/32
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#33).
Change subject: src/soc/intel/common/cse: Add helper functions to support CSE FW update ......................................................................
src/soc/intel/common/cse: Add helper functions to support CSE FW update
Below helper functions are added: * cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". The CSE enters this mode when it boots from RO_BP1 region.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/33
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#35).
Change subject: soc/intel/common: Add function to wait CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait CSE to enter Soft Temp Disable mode
Below helper functions are added: * cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". CSE enters this mode when it boots from RO_BP1 region. The function must be called after resetting CSE to wait for CSE to enter Soft Temp Disable Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/35
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#36).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". CSE enters this mode when it boots from RO_BP1 region. The function must be called after resetting CSE to wait for CSE to enter Soft Temp Disable Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/36
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 36:
(3 comments)
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 314: HECI_DELAY_READY Is that the right timeout to use? I believe that is the one used for ensuring HECI is ready.
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 317: if (stopwatch_expired(&sw)) I think it would be good to have a print indicating the error?
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 200: cse_wait_com_soft_temp_disable I haven't seen the complete use of this yet, but I wonder if this really needs to be exposed out of the cse block. I imagine having a function like cse_reboot_to_ro() which takes all the steps required to ensure that CSE boots to RO and is ready for HMRFPO: --> Set next boot slot info --> CSE reset --> Wait for CSE to come back in Soft Temp Disable mode
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#37).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable". CSE enters this mode when it boots from RO_BP1 region. The function must be called after resetting CSE to wait for CSE to enter Soft Temp Disable Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 26 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/37
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#38).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO_BP1 region. The function must be called after resetting CSE to wait for CSE to enter Soft Temp Disable Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 26 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/38
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 38:
(4 comments)
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 317: uint8_t
Why this data type? Please use CB_SUCCESS and friends.
Since the function return 0 or 1, so uint8_t as return type.
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 314: HECI_DELAY_READY
Is that the right timeout to use? I believe that is the one used for ensuring HECI is ready.
15 seconds(HECI_DELAY_READY) is not right timeout in this context. Typically, CSE takes less than 1 second to boot from RO_BP1 after a reset. After a CSE reset, I notice CSE takes ~260ms to boot from RO_BP1 as logged by this function. Hence, I set delay time to 5 seconds.
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 317: if (stopwatch_expired(&sw))
I think it would be good to have a print indicating the error?
Done
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 200: cse_wait_com_soft_temp_disable
I haven't seen the complete use of this yet, but I wonder if this really needs to be exposed out of […]
The usage as you suggested can be seen in https://review.coreboot.org/c/coreboot/+/35403/54/src/soc/intel/common/basec....
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 39:
(3 comments)
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/16/src/soc/intel/common/block... PS16, Line 317: uint8_t
Since the function return 0 or 1, so uint8_t as return type.
Done
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 314: HECI_DELAY_READY
15 seconds(HECI_DELAY_READY) is not right timeout in this context. […]
Done
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/36786/36/src/soc/intel/common/block... PS36, Line 200: cse_wait_com_soft_temp_disable
The usage as you suggested can be seen in https://review.coreboot. […]
Done
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#40).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO_BP1 region. The function must be called after resetting CSE to wait for CSE to enter Soft Temp Disable Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 26 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/40
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#41).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO_BP1 region. The function must be called after resetting CSE to wait for CSE to enter Soft Temp Disable Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/41
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#42).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO(BP1) partition. The function must be called after resetting CSE to wait for CSE to enter 'Soft Temporary Disable' Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/42
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#43).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO(BP1) partition. The function must be called after resetting CSE to wait for CSE to enter 'Soft Temporary Disable' Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/43
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, V Sowmya, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36786
to look at the new patch set (#44).
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO(BP1) partition. The function must be called after resetting CSE to wait for CSE to enter 'Soft Temporary Disable' Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36786/44
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 44: Code-Review+1
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 44: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added: cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode 'Soft Temporary Disable'. CSE enters this mode when it boots from RO(BP1) partition. The function must be called after resetting CSE to wait for CSE to enter 'Soft Temporary Disable' Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36786 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Rizwan Qureshi rizwan.qureshi@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 28 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Rizwan Qureshi: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index afce985..5877d53 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -68,6 +68,9 @@ #define MEI_HDR_CSE_ADDR_START 0 #define MEI_HDR_CSE_ADDR (((1 << 8) - 1) << MEI_HDR_CSE_ADDR_START)
+/* Wait up to 5 seconds for CSE to boot from RO(BP1) */ +#define CSE_DELAY_BOOT_TO_RO (5 * 1000) + static struct cse_device { uintptr_t sec_bar; } cse; @@ -304,6 +307,26 @@ return 1; }
+/* + * Polls for CSE's current operation mode 'Soft Temporary Disable'. + * The CSE enters the current operation mode when it boots from RO(BP1). + */ +uint8_t cse_wait_com_soft_temp_disable(void) +{ + struct stopwatch sw; + stopwatch_init_msecs_expire(&sw, CSE_DELAY_BOOT_TO_RO); + while (!cse_is_hfs1_com_soft_temp_disable()) { + udelay(HECI_DELAY); + if (stopwatch_expired(&sw)) { + printk(BIOS_ERR, "HECI: Timed out waiting for CSE to boot from RO!\n"); + return 0; + } + } + printk(BIOS_SPEW, "HECI: CSE took %lu ms to boot from RO\n", + stopwatch_duration_msecs(&sw)); + return 1; +} + static int wait_heci_ready(void) { struct stopwatch sw; diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index af8d852..c597a3f 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -192,4 +192,9 @@ */ bool cse_is_hfs3_fw_sku_custom(void);
+/* + * Polls for CSE's current operation mode 'Soft Temp Disable'. + * Returns 0 on failure and 1 on success. + */ +uint8_t cse_wait_com_soft_temp_disable(void); #endif // SOC_INTEL_COMMON_CSE_H
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 45:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/684 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/683 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/682
Please note: This test is under development and might not be accurate at all!