build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71598 )
Change subject: Revert "sb/amd: Remove dropped platforms" ......................................................................
Patch Set 1:
(134 comments)
File src/southbridge/amd/agesa/hudson/chip.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/20ed09a0_f787d4bb PS1, Line 7: { open brace '{' following struct go on the same line
File src/southbridge/amd/agesa/hudson/enable_usbdebug.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/2d2656c5_d0a9f7aa PS1, Line 38: reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */ Possible repeated word: 'Port'
File src/southbridge/amd/agesa/hudson/lpc.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/3df1a0ae_ca589f30 PS1, Line 50: on on LPC, it holds PCI grant, so no LPC slave cycle can Possible repeated word: 'on'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b9614ff1_bcc8ac95 PS1, Line 247: if ((var_num > 0) && ((base >= reg_var[0]) && Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/a519ed39_38717ada PS1, Line 259: switch (var_num) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/4bc8d662_b8aceeb2 PS1, Line 262: if (res->size <= 16) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/09c09ed1_4882d6aa PS1, Line 262: if (res->size <= 16) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/64b4b428_9f259c0c PS1, Line 268: if (res->size <= 16) Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/936a62f7_d01940cf PS1, Line 273: if (res->size <= 16) Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f05228df_f88c88ee PS1, Line 289: /* Set WideIO for as many IOs found (fall through is on purpose) */ Prefer 'fallthrough;' over fallthrough comment
File src/southbridge/amd/agesa/hudson/sata.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/760f2a7f_26ebe2a4 PS1, Line 24: (u32*)(uintptr_t)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00); "(foo*)" should be "(foo *)"
File src/southbridge/amd/agesa/hudson/sd.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/9c005c2c_77e5465f PS1, Line 26: else { /* SD 2.0 mode */ else should follow close brace '}'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b0336f47_44cc846f PS1, Line 32: else { /* Stepping >= A1 */ else should follow close brace '}'
File src/southbridge/amd/agesa/hudson/smbus.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/1a6616a4_f1bc456a PS1, Line 38: if (val & 0x1c) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/24de9d34_eb2c4dee PS1, Line 54: if (smbus_wait_until_ready(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/908eafc7_144bd557 PS1, Line 67: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/6098a0a4_92027c52 PS1, Line 81: if (smbus_wait_until_ready(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b3aaa40e_f9000b98 PS1, Line 97: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/bfd7cf55_6d9ef541 PS1, Line 108: if (smbus_wait_until_ready(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/15774617_88a6d391 PS1, Line 124: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f3c2f306_783fb6dd PS1, Line 138: if (smbus_wait_until_ready(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/4ff95a33_47d3c6a8 PS1, Line 157: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
File src/southbridge/amd/agesa/hudson/smbus_spd.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/44fbb720_892dee87 PS1, Line 34: for (;;) that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/5e790d18_e7ca9063 PS1, Line 37: if (__rdtsc() > limit) break; trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/34bcae4e_17f4c9fe PS1, Line 38: if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/251929ad_376b6e1a PS1, Line 39: if ((status & 1) == 1) continue; // HostBusy set, keep waiting trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/379716cb_32c7e966 PS1, Line 43: buffer [0] = __inbyte(iobase + 5); space prohibited before open square bracket '['
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/6f69caa1_6f3b0a6e PS1, Line 44: if (status == 2) status = 0; // check for done with no errors trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/068574bf_b4122c15 PS1, Line 64: for (;;) that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/0a214d3a_e358a476 PS1, Line 67: if (__rdtsc() > limit) break; trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e3d36045_e0a93fbd PS1, Line 68: if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d6921f3f_713a894f PS1, Line 69: if ((status & 1) == 1) continue; // HostBusy set, keep waiting trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/9ac7ae9b_e9c626a6 PS1, Line 73: buffer [0] = __inbyte(iobase + 5); space prohibited before open square bracket '['
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/575cbcd4_ee7b7aec PS1, Line 74: if (status == 2) status = 0; // check for done with no errors trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/bbaa5634_809775c7 PS1, Line 104: for (index = 1; index < count; index++) that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/0003c82e_a8685f48 PS1, Line 106: error = readSmbusByte(iobase, SmbusSlaveAddress, &buffer [index]); space prohibited before open square bracket '['
File src/southbridge/amd/agesa/hudson/spi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/dffdaca3_bebd4adf PS1, Line 63: while ((spi_read(SPI_REG_CNTRL02) & CNTRL02_EXEC_OPCODE) && trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/4143c437_1ea681fd PS1, Line 112: for (count = 0; count < bytesout; count++, dout++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/72403672_078c1364 PS1, Line 121: for (count = 0; count < bytesout; count++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/3caaff4c_d8564a02 PS1, Line 125: for (count = 0; count < bytesin; count++, din++) { braces {} are not necessary for single statement blocks
File src/southbridge/amd/cimx/sb800/Amd.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b7bf41d1_ae78ba93 PS1, Line 53: PreMemHeap = 0, ///< Create heap in cache. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/96bf8c78_a6c8036e PS1, Line 54: PostMemDram, ///< Create heap in memory. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d08e5546_a38f31c6 PS1, Line 55: ByHost ///< Create heap by Host. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/244a9e63_1d8ba7a8 PS1, Line 60: AccessWidth8 = 1, ///< Access width is 8 bits. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d42784e5_3a5a3a4d PS1, Line 61: AccessWidth16, ///< Access width is 16 bits. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/cca6c855_d79834c4 PS1, Line 62: AccessWidth32, ///< Access width is 32 bits. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f511e052_49a18db2 PS1, Line 63: AccessWidth64, ///< Access width is 64 bits. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e1ad70e0_3347d128 PS1, Line 65: AccessS3SaveWidth8 = 0x81, ///< Save 8 bits data. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/cdd03fbf_717feb0c PS1, Line 66: AccessS3SaveWidth16, ///< Save 16 bits data. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/91699365_1df0c0cd PS1, Line 67: AccessS3SaveWidth32, ///< Save 32 bits data. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d96f9864_5d1bdfe7 PS1, Line 68: AccessS3SaveWidth64, ///< Save 64 bits data. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b9820eb2_9f59dc84 PS1, Line 75: IN unsigned int ImageBasePtr; ///< The AGESA Image base address. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/47eda50b_099b912d PS1, Line 76: IN unsigned int Func; ///< The service desired, @sa dispatch.h. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/3fe4d5aa_80de40c6 PS1, Line 77: IN unsigned int AltImageBasePtr; ///< Alternate Image location please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/8fe2e050_eeffb6c9 PS1, Line 78: IN unsigned int PcieBasePtr; ///< PCIe MMIO Base address, if configured. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/eb6ef11f_ec3d6a89 PS1, Line 79: union { ///< Callback pointer please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/2294c0d2_be895dd6 PS1, Line 80: IN unsigned long long PlaceHolder; ///< Place holder please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/4a0f8ca0_30e1cae4 PS1, Line 81: IN CALLOUT_ENTRY CalloutPtr; ///< For Callout from AGESA please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/05c3b8e0_b7f89f45 PS1, Line 82: } CALLBACK; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e20af17b_5c63f6e2 PS1, Line 83: IN OUT unsigned int Reserved[2]; ///< This space is reserved for future use. please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/3cdb1e4c_6cbf71e9 PS1, Line 88: IN unsigned int Signature; ///< Binary Signature please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b2889631_17e2ef44 PS1, Line 89: IN signed char CreatorID[8]; ///< 8 characters ID please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e5816041_b0d6d710 PS1, Line 90: IN signed char Version[12]; ///< 12 characters version please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b5d72b50_48552c61 PS1, Line 91: IN unsigned int ModuleInfoOffset; ///< Offset of module please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/72cc8d6a_957445c1 PS1, Line 92: IN unsigned int EntryPointAddress; ///< Entry address please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e92397dd_274ca2aa PS1, Line 93: IN unsigned int ImageBase; ///< Image base please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/51f1155c_ac15a088 PS1, Line 94: IN unsigned int RelocTableOffset; ///< Relocate Table offset please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/ec65061c_667ed5f0 PS1, Line 95: IN unsigned int ImageSize; ///< Size please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/a994eb5c_5f66d125 PS1, Line 96: IN unsigned short Checksum; ///< Checksum please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/424dc612_892ed969 PS1, Line 97: IN unsigned char ImageType; ///< Type please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/6d857f7c_b0982ce9 PS1, Line 98: IN unsigned char V_Reserved; ///< Reserved please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/37675d7c_15a88f12 PS1, Line 103: IN unsigned int ModuleHeaderSignature; ///< Module signature please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f9450b1e_3508c7d1 PS1, Line 104: IN signed char ModuleIdentifier[8]; ///< 8 characters ID please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/6882388f_c3efb489 PS1, Line 105: IN signed char ModuleVersion[12]; ///< 12 characters version please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/38687bcb_99c5a8ad PS1, Line 106: IN MODULE_ENTRY ModuleDispatcherPtr; ///< A pointer point to dispatcher please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/ae4e4167_1e2fac26 PS1, Line 107: IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f803be51_eddbc26a PS1, Line 130: IN OUT unsigned int EAX_Reg; ///< CPUID instruction result in EAX please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/ef5120e3_9563a2d2 PS1, Line 131: IN OUT unsigned int EBX_Reg; ///< CPUID instruction result in EBX please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/eb702d64_ccd4fa2a PS1, Line 132: IN OUT unsigned int ECX_Reg; ///< CPUID instruction result in ECX please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/940bd33e_222440e5 PS1, Line 133: IN OUT unsigned int EDX_Reg; ///< CPUID instruction result in EDX please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/77f65f79_65cebe07 PS1, Line 142: HT_FREQUENCY_200M = 0, ///< HT speed 200 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/1f449543_c69e3fc4 PS1, Line 143: HT_FREQUENCY_400M = 2, ///< HT speed 400 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/a07d924e_7167ab38 PS1, Line 144: HT_FREQUENCY_600M = 4, ///< HT speed 600 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/33649dc0_29ee02e1 PS1, Line 145: HT_FREQUENCY_800M = 5, ///< HT speed 800 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/36d90692_d8f72d44 PS1, Line 146: HT_FREQUENCY_1000M = 6, ///< HT speed 1000 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/04ddc37e_d12446ed PS1, Line 147: HT_FREQUENCY_1200M = 7, ///< HT speed 1200 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/2295200e_3131fe00 PS1, Line 148: HT_FREQUENCY_1400M = 8, ///< HT speed 1400 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/1456db79_5ae129bb PS1, Line 149: HT_FREQUENCY_1600M = 9, ///< HT speed 1600 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/bf7c520c_54c6f808 PS1, Line 150: HT_FREQUENCY_1800M = 10, ///< HT speed 1800 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f00a3990_47d6cf12 PS1, Line 151: HT_FREQUENCY_2000M = 11, ///< HT speed 2000 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/ed275163_55859087 PS1, Line 152: HT_FREQUENCY_2200M = 12, ///< HT speed 2200 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/972b0875_4d045c73 PS1, Line 153: HT_FREQUENCY_2400M = 13, ///< HT speed 2400 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/5f705113_2f440610 PS1, Line 154: HT_FREQUENCY_2600M = 14, ///< HT speed 2600 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/dd58f29f_7a96f00b PS1, Line 155: HT_FREQUENCY_2800M = 17, ///< HT speed 2800 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/1c4e7bde_1ee27ce8 PS1, Line 156: HT_FREQUENCY_3000M = 18, ///< HT speed 3000 for external callbacks please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/324662b0_42718153 PS1, Line 157: HT_FREQUENCY_3200M = 19 ///< HT speed 3200 for external callbacks please, no spaces at the start of a line
File src/southbridge/amd/cimx/sb800/AmdSbLib.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d7f3f068_8fe672ee PS1, Line 18: { open brace '{' following struct go on the same line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e458c76d_b7983a65 PS1, Line 19: unsigned int AMDLogo; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/eff317db_ca5beff5 PS1, Line 20: unsigned long long CreatorID; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e329503c_8aea6d42 PS1, Line 21: unsigned int Version1; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/5fc8dd55_59414bf6 PS1, Line 22: unsigned int Version2; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/79d651f2_cc96c230 PS1, Line 23: unsigned int Version3; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d6eeadf1_02a641b8 PS1, Line 24: unsigned int ModuleInfoOffset; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/90cb86f7_b4ee5fa7 PS1, Line 25: unsigned int EntryPoint; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/6669edd3_0eab44bc PS1, Line 26: unsigned int ImageBase; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/c0f1bc41_267b129a PS1, Line 27: unsigned int RelocTableOffset; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/67920d6c_761b1c46 PS1, Line 28: unsigned int ImageSize; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/b8a5e969_4dbd368f PS1, Line 29: unsigned short CheckSum; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/6759c5ba_ebccc585 PS1, Line 30: unsigned char ImageType; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/4c4f1038_6d52cb10 PS1, Line 31: unsigned char Reserved2; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/5ef5d22d_c356e0b7 PS1, Line 134: { open brace '{' following enum go on the same line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/428cd24d_736bf52b PS1, Line 135: AccWidthUint8 = 0, please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/0c81a928_f6ea122d PS1, Line 136: AccWidthUint16, please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f62dff12_661afae6 PS1, Line 137: AccWidthUint32, please, no spaces at the start of a line
File src/southbridge/amd/cimx/sb800/chip.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/d16779cb_483fdc66 PS1, Line 19: { open brace '{' following struct go on the same line
File src/southbridge/amd/cimx/sb800/fan.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/c0659cd9_75248ccf PS1, Line 261: if (sb_chip->imc_tempin3_enabled) { suspicious code indentation after conditional statements
File src/southbridge/amd/cimx/sb800/late.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e6cebdf7_41eac2a8 PS1, Line 96: if (!(val & HOST_CTL_AHCI_EN)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/f9a1f232_b4c3c8bb PS1, Line 344: if (sb_config->AzaliaController == AZALIA_DISABLE) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/63c86325_db3c1a20 PS1, Line 374: if (dev->enabled) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/1dd2f06e_4190cec6 PS1, Line 385: if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15, 0)) break; trailing statements should be on next line
File src/southbridge/amd/cimx/sb800/lpc.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/0bb112f8_cbf70d3c PS1, Line 135: if (var_num >= 3) Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/5aca9eed_fff930a0 PS1, Line 137: switch (var_num) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/972e2b5f_6e1ec1b3 PS1, Line 157: /* Set WideIO for as many IOs found (fall through is on purpose) */ Prefer 'fallthrough;' over fallthrough comment
File src/southbridge/amd/cimx/sb800/smbus.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/a11e371a_16a93846 PS1, Line 36: if (val & 0x1c) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/22b201ce_cd89ec01 PS1, Line 67: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e7796d4d_4e269be5 PS1, Line 82: if (smbus_wait_until_ready(smbus_io_base) < 0) { suspicious code indentation after conditional statements
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/60dbc8fd_cad055fe PS1, Line 100: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/a2557c71_4bcaa867 PS1, Line 130: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/84687465_cee371a7 PS1, Line 166: if (smbus_wait_until_done(smbus_io_base) < 0) { braces {} are not necessary for single statement blocks
File src/southbridge/amd/cimx/sb800/smbus_spd.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/dc77f30b_4d23e506 PS1, Line 32: #define SMBUS_FREQUENCY_CONST 66000000 / 4 Macros with complex values should be enclosed in parentheses
File src/southbridge/amd/cimx/sb800/spi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/cc6d4a97_783fb3ce PS1, Line 31: while ((read8((void *)(spibar + 2)) & 1) && trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/9c2f0c3d_57d2406c PS1, Line 74: for (count = 0; count < bytesout; count++, dout++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e1e52625_2cc82841 PS1, Line 83: for (count = 0; count < bytesout; count++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167472): https://review.coreboot.org/c/coreboot/+/71598/comment/e6062a26_5789bf66 PS1, Line 88: for (count = 0; count < bytesin; count++, din++) { braces {} are not necessary for single statement blocks