Change in coreboot[master]: soc/intel/xeon_sp: Set MSR locks

[Marc Jones (Code Review)]

Attention is currently required from: Jonathan Zhang, Stefan Reinauer, Arthur Heymans, Patrick Rudolph.
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52160 )

Change subject: soc/intel/xeon_sp: Set MSR locks
......................................................................

Patch Set 1:

(2 comments)

File src/soc/intel/xeon_sp/Kconfig:

https://review.coreboot.org/c/coreboot/+/52160/comment/afddf2f1_82de4c10 
PS1, Line 39: PARALLEL_MP_AP_WORK
> remove from tiogapass Kconfig.

Ack

File src/soc/intel/xeon_sp/cpx/chip.c:

https://review.coreboot.org/c/coreboot/+/52160/comment/3d8ecb59_56bd5e60 
PS1, Line 146: set_msr_locks
> This has to happen so late or can it happen during the CPU init?

I think that this could happen in each_cpu_init, but I have been getting feedback to set the locks in finalize functions. *s, shrug* I guess someone might change turbo just prior to ACPI table setup. AES lock could be set anytime.