Change in coreboot[master]: WIP: mediatek/mt8192: spm: Align spm_firmware_binary to 16-byte

[Nicolas Boichat (Code Review)]

Nicolas Boichat has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47282 )

Change subject: WIP: mediatek/mt8192: spm: Align spm_firmware_binary to 16-byte
......................................................................

WIP: mediatek/mt8192: spm: Align spm_firmware_binary to 16-byte

16-byte alignement is critical, else the DMA transfer will corrupt
data at 4096-byte boundaries.

BUG=b:172177570
TEST=Asurada boots up to shell, suspend works

Change-Id: I016062d04dd07950405d38f42e5e0ee01371c174
Signed-off-by: Nicolas Boichat 
---
M src/soc/mediatek/mt8192/spm.c
1 file changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/47282/1

diff --git a/src/soc/mediatek/mt8192/spm.c b/src/soc/mediatek/mt8192/spm.c
index a6f2109..4847377 100644
--- a/src/soc/mediatek/mt8192/spm.c
+++ b/src/soc/mediatek/mt8192/spm.c
@@ -9,7 +9,11 @@
 #include <soc/spm.h>
 #include <timer.h>

-static const u32 spm_firmware_binary[] = {
+/*
+ * 16-byte alignement is critical, else the DMA transfer will corrupt data at
+ * 4096-byte boundaries.
+ */
+static const u32 spm_firmware_binary[] __aligned(16) = {
    0x3200001e, 0x6a00001e, 0x6e00001e, 0x6800001e, 0x6200001e, 0x6000001e,
    0x5e00001e, 0x5c00001e, 0x6000001e, 0x5800001e, 0x5600001e, 0x5400001e,
    0x5200001e, 0x5000001e, 0x4e00001e, 0x4c00001e, 0xd402001e, 0xee01001e,

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47282 )

Change subject: WIP: mediatek/mt8192: spm: Align spm_firmware_binary to 16-byte
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47282/1/src/soc/mediatek/mt8192/spm... 
File src/soc/mediatek/mt8192/spm.c:

https://review.coreboot.org/c/coreboot/+/47282/1/src/soc/mediatek/mt8192/spm... 
PS1, Line 13:  * 16-byte alignement is critical, else the DMA transfer will corrupt data at
'alignement' may be misspelled - perhaps 'alignment'?

[Nicolas Boichat (Code Review)]

Nicolas Boichat has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47282 )

Change subject: WIP: mediatek/mt8192: spm: Align spm_firmware_binary to 16-byte
......................................................................

Patch Set 1:

Critical to ensure data is copied properly (SPM _may_ appear to work if the data corruption happens in some locations)

[Nicolas Boichat (Code Review)]

Nicolas Boichat has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47282 )

Change subject: WIP: mediatek/mt8192: spm: Align spm_firmware_binary to 16-byte
......................................................................

Abandoned

Also fixed by MTK.