[XS] Change in coreboot[main]: src/include/cpu/x86: Add Extended Feature Enable Register Macro

[Subrata Banik (Code Review)]

Attention is currently required from: Jérémy Compostella, Saurabh Mishra.

Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/84174?usp=email )

Change subject: src/include/cpu/x86: Add Extended Feature Enable Register Macro
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Patch Set 5:

(1 comment)

File src/include/cpu/x86/msr.h:

https://review.coreboot.org/c/coreboot/+/84174/comment/5eb5a9b7_0c2faa2a?usp... :
PS4, Line 64:
> Hi, these bits belogs to (POWER_CTL) – Offset 1fc
> Indent w/ one space will align with Offset 0x1F8.

if these bits belong to offset 0x1fc then you should have moved those bit-definitions inside https://github.com/coreboot/coreboot/blob/main/src/soc/intel/common/block/in...

what motivates you to define 0x1fc bit-fields into x84/MSR.h when the same definition exists into intelblock?