Change in coreboot[master]: soc/mediatek: PCI: Assert PERST# at bootblock stage

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Jianjun Wang.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 )

Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage
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Patch Set 8:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62359/comment/b69d3c17_3167f3ad 
PS1, Line 28:
> Did you mean the system bootup time?

The commit message now says the 100ms delay is reduced, so Paul is asking what's the reduced delay. Since there's no longer mdelay() call, maybe revise the commit message as

Instead of asserting PERST# right before PCIe initialization and wait for 100ms, assert the pin in bootblock stage so that the extra 100ms delay could be avoided.