Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61585 )
Change subject: mb/google/cyan: Fixup variant GPIOs ......................................................................
mb/google/cyan: Fixup variant GPIOs
- set GPSE-77 (Maxim jack detect) to NC for variants using Realtek audio - set GPSW-37 to NC for all variants (not used for LPE audio) - set GPSW-95 (Realtek jack detect) to NC for variant using Maxim audio - set GPSE-77 as maskable on variant using Maxim audio, to match mask setting for jack detect GPIO on other variants - set GPSE-81 as maskable on CELES to prevent interrupt storm (likely due to change in cherryview pinctrl driver circa kernel v3.18 which no longer masks all interrupts at init)
Change-Id: I50d4b3516eba8906042bb8dea768b229afcf11ea Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/cyan/variants/banon/gpio.c M src/mainboard/google/cyan/variants/celes/gpio.c M src/mainboard/google/cyan/variants/cyan/gpio.c M src/mainboard/google/cyan/variants/edgar/gpio.c M src/mainboard/google/cyan/variants/kefka/gpio.c M src/mainboard/google/cyan/variants/reks/gpio.c M src/mainboard/google/cyan/variants/relm/gpio.c M src/mainboard/google/cyan/variants/setzer/gpio.c M src/mainboard/google/cyan/variants/terra/gpio.c M src/mainboard/google/cyan/variants/ultima/gpio.c M src/mainboard/google/cyan/variants/wizpig/gpio.c 11 files changed, 20 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/61585/1
diff --git a/src/mainboard/google/cyan/variants/banon/gpio.c b/src/mainboard/google/cyan/variants/banon/gpio.c index b2d1cbe..4e91db4 100644 --- a/src/mainboard/google/cyan/variants/banon/gpio.c +++ b/src/mainboard/google/cyan/variants/banon/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ GPIO_NC, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ diff --git a/src/mainboard/google/cyan/variants/celes/gpio.c b/src/mainboard/google/cyan/variants/celes/gpio.c index b385ad7..71e209e 100644 --- a/src/mainboard/google/cyan/variants/celes/gpio.c +++ b/src/mainboard/google/cyan/variants/celes/gpio.c @@ -51,12 +51,11 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ - GPI(trig_edge_both, L1, P_20K_H, non_maskable, + GPI(trig_edge_both, L1, P_20K_H, maskable, en_edge_detect, NA, NA), /* 81 SDMMC3_CD_B */ GPIO_NC, /* 82 spkr assumed gpio number */ @@ -92,8 +91,7 @@ /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 47 I2C6_SDA */ diff --git a/src/mainboard/google/cyan/variants/cyan/gpio.c b/src/mainboard/google/cyan/variants/cyan/gpio.c index 9491c25..5723acf 100644 --- a/src/mainboard/google/cyan/variants/cyan/gpio.c +++ b/src/mainboard/google/cyan/variants/cyan/gpio.c @@ -51,8 +51,8 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPI(trig_edge_both, L0, NA, 0, en_edge_detect, NA, NA), + /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ @@ -90,8 +90,7 @@ /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ GPIO_NC, /* 46 I2C4_SDA */ NATIVE_PU20K(2), /* 47 I2C6_SDA */ @@ -124,8 +123,7 @@ assert it low. */ GPIO_OUT_LOW, /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */ Native_M1, /* 94 GP_SSP_2_RXD */ - GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA), - /* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */ + GPIO_NC, /* 95 RTK_AUDIO_CODEC_IRQ */ Native_M1, /* 96 GP_SSP_2_FS */ NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */ GPIO_END diff --git a/src/mainboard/google/cyan/variants/edgar/gpio.c b/src/mainboard/google/cyan/variants/edgar/gpio.c index c1b43b8..d285c04 100644 --- a/src/mainboard/google/cyan/variants/edgar/gpio.c +++ b/src/mainboard/google/cyan/variants/edgar/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ diff --git a/src/mainboard/google/cyan/variants/kefka/gpio.c b/src/mainboard/google/cyan/variants/kefka/gpio.c index 4e4b01a..23fe4e1 100644 --- a/src/mainboard/google/cyan/variants/kefka/gpio.c +++ b/src/mainboard/google/cyan/variants/kefka/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ diff --git a/src/mainboard/google/cyan/variants/reks/gpio.c b/src/mainboard/google/cyan/variants/reks/gpio.c index ece6c80..13cc639 100644 --- a/src/mainboard/google/cyan/variants/reks/gpio.c +++ b/src/mainboard/google/cyan/variants/reks/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ @@ -90,8 +89,7 @@ /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ NATIVE_PU20K(2), /* 47 I2C6_SDA */ diff --git a/src/mainboard/google/cyan/variants/relm/gpio.c b/src/mainboard/google/cyan/variants/relm/gpio.c index 5a0c13a..2d308f5 100644 --- a/src/mainboard/google/cyan/variants/relm/gpio.c +++ b/src/mainboard/google/cyan/variants/relm/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ @@ -90,8 +89,7 @@ /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ NATIVE_PU20K(2), /* 47 I2C6_SDA */ diff --git a/src/mainboard/google/cyan/variants/setzer/gpio.c b/src/mainboard/google/cyan/variants/setzer/gpio.c index cdf57a4..c57d28c 100644 --- a/src/mainboard/google/cyan/variants/setzer/gpio.c +++ b/src/mainboard/google/cyan/variants/setzer/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ diff --git a/src/mainboard/google/cyan/variants/terra/gpio.c b/src/mainboard/google/cyan/variants/terra/gpio.c index 11071eb..d2e79f1 100644 --- a/src/mainboard/google/cyan/variants/terra/gpio.c +++ b/src/mainboard/google/cyan/variants/terra/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ diff --git a/src/mainboard/google/cyan/variants/ultima/gpio.c b/src/mainboard/google/cyan/variants/ultima/gpio.c index cef45aa..ede6229 100644 --- a/src/mainboard/google/cyan/variants/ultima/gpio.c +++ b/src/mainboard/google/cyan/variants/ultima/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ @@ -90,8 +89,7 @@ /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ NATIVE_PU20K(2), /* 47 I2C6_SDA */ diff --git a/src/mainboard/google/cyan/variants/wizpig/gpio.c b/src/mainboard/google/cyan/variants/wizpig/gpio.c index 6e99330..3bb3931 100644 --- a/src/mainboard/google/cyan/variants/wizpig/gpio.c +++ b/src/mainboard/google/cyan/variants/wizpig/gpio.c @@ -51,8 +51,7 @@ GPIO_NC, /* 69 MMC1_RCLK */ Native_M1, /* 75 GPO USB_OC1_B */ Native_M1, /* 76 PMU_RESETBUTTON_B */ - GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA), - /* GPIO_ALERT 77 */ + GPIO_NC, /* GPIO_ALERT 77 */ Native_M1, /* 78 SDMMC3_PWR_EN_B */ GPIO_NC, /* 79 GPI ILB_SERIRQ */ Native_M1, /* 80 USB_OC0_B */ @@ -90,8 +89,7 @@ /* 34 MF_HDA_DOCKRSTB */ GPIO_NC, /* 35 MF_HDA_SYNC */ GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ - GPI(trig_edge_both, L2, P_1K_H, non_maskable, en_edge_detect, NA, NA), - /* 37 MF_HDA_DOCKENB */ + GPIO_NC, /* 37 MF_HDA_DOCKENB */ NATIVE_PU1K_CSEN_INVTX(1), /* 45 I2C5_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ NATIVE_PU1K_CSEN_INVTX(1), /* 47 I2C6_SDA */