Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44487 )
Change subject: soc/amd/stoneyridge: remove unused soc_power_reg object ......................................................................
soc/amd/stoneyridge: remove unused soc_power_reg object
Now that no one is consuming this object, remove its definition.
BUG=b:159947207
Signed-off-by: Aaron Durbin adurbin@chromium.org Change-Id: Ib5aeec1733b6c9fa49569e30c4c369f70af0939c --- M src/soc/amd/stoneyridge/include/soc/southbridge.h 1 file changed, 0 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/44487/1
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 80c258f..85df0b3 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -318,14 +318,6 @@ unsigned int :4; } __packed aoac_devs_t;
-struct soc_power_reg { - uint16_t pm1_sts; - uint16_t pm1_en; - uint32_t gpe0_sts; - uint32_t gpe0_en; - uint16_t wake_from; -}; - #define XHCI_FW_SIG_OFFSET 0xc #define XHCI_FW_ADDR_OFFSET 0x6 #define XHCI_FW_SIZE_OFFSET 0x8
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44487 )
Change subject: soc/amd/stoneyridge: remove unused soc_power_reg object ......................................................................
Patch Set 1: Code-Review+2
Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44487 )
Change subject: soc/amd/stoneyridge: remove unused soc_power_reg object ......................................................................
soc/amd/stoneyridge: remove unused soc_power_reg object
Now that no one is consuming this object, remove its definition.
BUG=b:159947207
Signed-off-by: Aaron Durbin adurbin@chromium.org Change-Id: Ib5aeec1733b6c9fa49569e30c4c369f70af0939c Reviewed-on: https://review.coreboot.org/c/coreboot/+/44487 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/stoneyridge/include/soc/southbridge.h 1 file changed, 0 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 80c258f..85df0b3 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -318,14 +318,6 @@ unsigned int :4; } __packed aoac_devs_t;
-struct soc_power_reg { - uint16_t pm1_sts; - uint16_t pm1_en; - uint32_t gpe0_sts; - uint32_t gpe0_en; - uint16_t wake_from; -}; - #define XHCI_FW_SIG_OFFSET 0xc #define XHCI_FW_ADDR_OFFSET 0x6 #define XHCI_FW_SIZE_OFFSET 0x8
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)